* [GIT PULL] KVM/riscv changes for 7.2
@ 2026-06-14 9:49 Anup Patel
2026-06-26 8:21 ` patchwork-bot+linux-riscv
2026-06-26 11:16 ` patchwork-bot+linux-riscv
0 siblings, 2 replies; 3+ messages in thread
From: Anup Patel @ 2026-06-14 9:49 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Atish Patra,
KVM RISC-V (KVM/riscv), KVM General, linux-riscv
Hi Paolo,
We have the following KVM RISC-V changes for 7.2:
1) Batch G-stage TLB flushes for GPA range based page table updates
2) Convert HGEI line management to fully per-HART
3) Speed up dirty logging write faults using MMU rwlock and atomic
PTE updates for permission-only changes
4) Use flexible array for APLIC IRQ state
5) FWFT fixes for missing CSR dirty marking and stale feature
exposure to Guest/VM
6) Fix logging enable check on a memslot by using
kvm_slot_dirty_track_enabled()
7) Fixes to avoid skipping valid pages in kvm_riscv_gstage_wp_range()
and kvm_riscv_gstage_unmap_range()
Please pull.
Regards,
Anup
The following changes since commit e7ae89a0c97ce2b68b0983cd01eda67cf373517d:
Linux 7.1-rc5 (2026-05-24 13:48:06 -0700)
are available in the Git repository at:
https://github.com/kvm-riscv/linux.git tags/kvm-riscv-7.2-1
for you to fetch changes up to 52738352a6f29279e15285fcb7b50241ef867e27:
riscv: kvm: Use endian-specific __lelong for NACL shared memory
(2026-06-14 11:09:41 +0530)
----------------------------------------------------------------
KVM/riscv changes for 7.2
- Batch G-stage TLB flushes for GPA range based page table updates
- Convert HGEI line management to fully per-HART
- Fix missing CSR dirty marking when FWFT state updated via ONE_REG
- Fix stale FWFT feature exposure to Guest/VM
- Speed up dirty logging write faults using MMU rwlock and atomic
PTE updates using cmpxchg() for permission-only changes
- Use flexible array for APLIC IRQ state
- Use kvm_slot_dirty_track_enabled() for logging enable check on
a memslot
- Avoid skipping valid pages in kvm_riscv_gstage_wp_range()
- Avoid skipping valid pages in kvm_riscv_gstage_unmap_range()
- Use endian-specific __lelong for NACL shared memory
----------------------------------------------------------------
Guo Ren (Alibaba DAMO Academy) (2):
irqchip/riscv-imsic: Add nr_guest_files in per-HART local config
RISC-V: KVM: AIA: Make HGEI number management fully per-CPU
Inochi Amaoto (1):
RISC-V: KVM: Enhance the logging check for mmu mapping
Jiakai Xu (2):
RISC-V: KVM: Document a TOCTOU race in SBI system suspend handler
RISC-V: KVM: Fix NULL pointer dereference in AIA IMSIC functions
Jinyu Tang (8):
RISC-V: KVM: Batch stage-2 TLB flushes
KVM: riscv: Rely on common MMU notifier locking
KVM: riscv: Use an rwlock for mmu_lock
KVM: riscv: Add a G-stage PTE cmpxchg helper
KVM: riscv: Update G-stage PTE permissions atomically
KVM: riscv: Fast-path dirty logging write faults
KVM: riscv: Check hugetlb block mappings against memslot bounds
KVM: selftests: Add a hugetlb memslot alignment test mode
Mayuresh Chitale (1):
RISC-V: KVM: Fix ebreak self test failure
Qiang Ma (1):
RISC-V: KVM: Fix timer state restore
Rosen Penev (1):
RISC-V: KVM: Use flexible array for APLIC IRQ state
Sean Chang (1):
riscv: kvm: Use endian-specific __lelong for NACL shared memory
Wu Fei (2):
RISC-V: KVM: Fix skip of valid pages in kvm_riscv_gstage_wp_range
RISC-V: KVM: Fix skip of valid pages in kvm_riscv_gstage_unmap_range
Yong-Xuan Wang (5):
KVM: RISC-V: SBI FWFT: Mark vCPU CSRs dirty after setting feature value
KVM: RISC-V: SBI FWFT: Add optional init() callback for hardware probing
KVM: RISC-V: SBI FWFT: Fix stale feature exposure after runtime
extension changes
KVM: riscv: selftests: Refactor ISA and SBI extension sublist macros
KVM: riscv: selftests: Split SBI FWFT into separate
feature-specific sublists
arch/riscv/include/asm/kvm_aia.h | 2 +-
arch/riscv/include/asm/kvm_gstage.h | 10 +-
arch/riscv/include/asm/kvm_host.h | 2 +
arch/riscv/include/asm/kvm_nacl.h | 14 +-
arch/riscv/include/asm/uaccess.h | 2 +-
arch/riscv/kvm/aia.c | 88 +++++----
arch/riscv/kvm/aia_aplic.c | 15 +-
arch/riscv/kvm/aia_device.c | 4 +-
arch/riscv/kvm/aia_imsic.c | 9 +
arch/riscv/kvm/gstage.c | 100 ++++++----
arch/riscv/kvm/main.c | 8 +-
arch/riscv/kvm/mmu.c | 211 ++++++++++++++++++----
arch/riscv/kvm/nacl.c | 2 +-
arch/riscv/kvm/vcpu.c | 1 +
arch/riscv/kvm/vcpu_sbi_fwft.c | 44 ++++-
arch/riscv/kvm/vcpu_sbi_system.c | 14 ++
arch/riscv/kvm/vcpu_timer.c | 2 +-
drivers/irqchip/irq-riscv-imsic-state.c | 9 +-
include/linux/irqchip/riscv-imsic.h | 5 +-
tools/testing/selftests/kvm/kvm_page_table_test.c | 28 ++-
tools/testing/selftests/kvm/riscv/get-reg-list.c | 138 ++++++++------
21 files changed, 499 insertions(+), 209 deletions(-)
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [GIT PULL] KVM/riscv changes for 7.2
2026-06-14 9:49 [GIT PULL] KVM/riscv changes for 7.2 Anup Patel
@ 2026-06-26 8:21 ` patchwork-bot+linux-riscv
2026-06-26 11:16 ` patchwork-bot+linux-riscv
1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+linux-riscv @ 2026-06-26 8:21 UTC (permalink / raw)
To: Anup Patel
Cc: linux-riscv, pbonzini, palmer, pjw, andrew.jones, atish.patra,
kvm-riscv, kvm
Hello:
This pull request was applied to riscv/linux.git (fixes)
by Paolo Bonzini <pbonzini@redhat.com>:
On Sun, 14 Jun 2026 15:19:53 +0530 you wrote:
> Hi Paolo,
>
> We have the following KVM RISC-V changes for 7.2:
> 1) Batch G-stage TLB flushes for GPA range based page table updates
> 2) Convert HGEI line management to fully per-HART
> 3) Speed up dirty logging write faults using MMU rwlock and atomic
> PTE updates for permission-only changes
> 4) Use flexible array for APLIC IRQ state
> 5) FWFT fixes for missing CSR dirty marking and stale feature
> exposure to Guest/VM
> 6) Fix logging enable check on a memslot by using
> kvm_slot_dirty_track_enabled()
> 7) Fixes to avoid skipping valid pages in kvm_riscv_gstage_wp_range()
> and kvm_riscv_gstage_unmap_range()
>
> [...]
Here is the summary with links:
- [GIT,PULL] KVM/riscv changes for 7.2
https://git.kernel.org/riscv/c/c6f1b611c66f
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [GIT PULL] KVM/riscv changes for 7.2
2026-06-14 9:49 [GIT PULL] KVM/riscv changes for 7.2 Anup Patel
2026-06-26 8:21 ` patchwork-bot+linux-riscv
@ 2026-06-26 11:16 ` patchwork-bot+linux-riscv
1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+linux-riscv @ 2026-06-26 11:16 UTC (permalink / raw)
To: Anup Patel
Cc: linux-riscv, pbonzini, palmer, pjw, andrew.jones, atish.patra,
kvm-riscv, kvm
Hello:
This pull request was applied to riscv/linux.git (for-next)
by Paolo Bonzini <pbonzini@redhat.com>:
On Sun, 14 Jun 2026 15:19:53 +0530 you wrote:
> Hi Paolo,
>
> We have the following KVM RISC-V changes for 7.2:
> 1) Batch G-stage TLB flushes for GPA range based page table updates
> 2) Convert HGEI line management to fully per-HART
> 3) Speed up dirty logging write faults using MMU rwlock and atomic
> PTE updates for permission-only changes
> 4) Use flexible array for APLIC IRQ state
> 5) FWFT fixes for missing CSR dirty marking and stale feature
> exposure to Guest/VM
> 6) Fix logging enable check on a memslot by using
> kvm_slot_dirty_track_enabled()
> 7) Fixes to avoid skipping valid pages in kvm_riscv_gstage_wp_range()
> and kvm_riscv_gstage_unmap_range()
>
> [...]
Here is the summary with links:
- [GIT,PULL] KVM/riscv changes for 7.2
https://git.kernel.org/riscv/c/c6f1b611c66f
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 3+ messages in thread
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