From: nadav.amit@gmail.com
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org,
Sean Christopherson <sean.j.christopherson@intel.com>,
Nadav Amit <nadav.amit@gmail.com>
Subject: [PATCH] x86: Wait for self IPI
Date: Mon, 15 Apr 2019 16:03:27 -0700 [thread overview]
Message-ID: <20190415230327.23949-1-nadav.amit@gmail.com> (raw)
From: Nadav Amit <nadav.amit@gmail.com>
There is no architectural requirement that self-IPI would be received on
the next instruction after it is generated. Make the test more robust by
not requiring it, and instead wait for some time or until it is
received.
Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
---
x86/apic.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/x86/apic.c b/x86/apic.c
index 0849f87..de5990c 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -255,13 +255,18 @@ static void self_ipi_isr(isr_regs_t *regs)
static void test_self_ipi(void)
{
+ u64 start = rdtsc();
int vec = 0xf1;
handle_irq(vec, self_ipi_isr);
irq_enable();
apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | vec,
0);
- asm volatile ("nop");
+
+ do {
+ pause();
+ } while (rdtsc() - start < 1000000000 && ipi_count == 0);
+
report("self ipi", ipi_count == 1);
}
--
2.17.1
next reply other threads:[~2019-04-15 23:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-15 23:03 nadav.amit [this message]
2019-04-15 23:04 ` [PATCH] x86: Wait for self IPI Nadav Amit
2019-04-16 15:24 ` Paolo Bonzini
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