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From: Paolo Bonzini <pbonzini@redhat.com>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: kvm@vger.kernel.org,
	Sean Christopherson <sean.j.christopherson@intel.com>
Subject: Re: [PATCH] x86: Wait for self IPI
Date: Tue, 16 Apr 2019 17:24:12 +0200	[thread overview]
Message-ID: <835f7916-176f-46ff-88b4-031cd5be693f@redhat.com> (raw)
In-Reply-To: <A34CA593-0237-4F9A-B9F4-DDB158C57C86@gmail.com>

On 16/04/19 01:04, Nadav Amit wrote:
>> On Apr 15, 2019, at 4:03 PM, nadav.amit@gmail.com wrote:
>>
>> From: Nadav Amit <nadav.amit@gmail.com>
>>
>> There is no architectural requirement that self-IPI would be received on
>> the next instruction after it is generated. Make the test more robust by
>> not requiring it, and instead wait for some time or until it is
>> received.
>>
>> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
>> ---
>> x86/apic.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/x86/apic.c b/x86/apic.c
>> index 0849f87..de5990c 100644
>> --- a/x86/apic.c
>> +++ b/x86/apic.c
>> @@ -255,13 +255,18 @@ static void self_ipi_isr(isr_regs_t *regs)
>>
>> static void test_self_ipi(void)
>> {
>> +    u64 start = rdtsc();
>>     int vec = 0xf1;
>>
>>     handle_irq(vec, self_ipi_isr);
>>     irq_enable();
>>     apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | vec,
>>                    0);
>> -    asm volatile ("nop");
>> +
>> +    do {
>> +        pause();
>> +    } while (rdtsc() - start < 1000000000 && ipi_count == 0);
>> +
>>     report("self ipi", ipi_count == 1);
>> }
>>
>> -- 
>> 2.17.1
> 
> This is of course a KVM-unit-tests patch.
> 

which I've queued, thanks.

Paolo

      reply	other threads:[~2019-04-16 15:24 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-15 23:03 [PATCH] x86: Wait for self IPI nadav.amit
2019-04-15 23:04 ` Nadav Amit
2019-04-16 15:24   ` Paolo Bonzini [this message]

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