From: Andrew Jones <andrew.jones@linux.dev>
To: Jesse Taube <jesse@rivosinc.com>
Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-kselftest@vger.kernel.org,
"Atish Patra" <atishp@atishpatra.org>,
"Anup Patel" <anup@brainfault.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Himanshu Chauhan" <hchauhan@ventanamicro.com>,
"Charlie Jenkins" <charlie@rivosinc.com>
Subject: Re: [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h
Date: Fri, 6 Jun 2025 10:32:20 +0200 [thread overview]
Message-ID: <20250606-cbdb324240e2de802f08d32c@orel> (raw)
In-Reply-To: <20250605161806.1206850-1-jesse@rivosinc.com>
On Thu, Jun 05, 2025 at 09:18:05AM -0700, Jesse Taube wrote:
> When handeling traps and faults it is offten necessary to know the size
handling
often
> of the instruction at epc. Add RV_INSN_LEN to calculate the
> instruction size.
>
> Signed-off-by: Jesse Taube <jesse@rivosinc.com>
> ---
> lib/riscv/asm/processor.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h
> index 40104272..631ce226 100644
> --- a/lib/riscv/asm/processor.h
> +++ b/lib/riscv/asm/processor.h
> @@ -7,6 +7,8 @@
> #define EXCEPTION_CAUSE_MAX 24
> #define INTERRUPT_CAUSE_MAX 16
>
> +#define RV_INSN_LEN(insn) ((((insn) & 0x3) < 0x3) ? 2 : 4)
> +
> typedef void (*exception_fn)(struct pt_regs *);
>
> struct thread_info {
> --
> 2.43.0
>
I've fixed the two typos while applying to riscv/sbi[1]
[1] https://gitlab.com/jones-drew/kvm-unit-tests/-/commits/riscv/sbi
Thanks,
drew
>
> --
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv
next prev parent reply other threads:[~2025-06-06 8:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-05 16:18 [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h Jesse Taube
2025-06-05 16:18 ` [kvm-unit-tests PATCH v3 2/2] riscv: sbi: Add SBI Debug Triggers Extension tests Jesse Taube
2025-06-06 8:48 ` Andrew Jones
2025-06-06 8:32 ` Andrew Jones [this message]
2025-07-02 14:49 ` [kvm-unit-tests PATCH v3 1/2] riscv: Add RV_INSN_LEN to processor.h Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250606-cbdb324240e2de802f08d32c@orel \
--to=andrew.jones@linux.dev \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=charlie@rivosinc.com \
--cc=cleger@rivosinc.com \
--cc=hchauhan@ventanamicro.com \
--cc=jesse@rivosinc.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=palmer@dabbelt.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox