From: Peter Zijlstra <peterz@infradead.org>
To: Sean Christopherson <seanjc@google.com>
Cc: Thomas Gleixner <tglx@kernel.org>,
Jim Mattson <jmattson@google.com>,
Binbin Wu <binbin.wu@linux.intel.com>,
Vishal L Verma <vishal.l.verma@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Rick P Edgecombe <rick.p.edgecombe@intel.com>,
Binbin Wu <binbin.wu@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
Paolo Bonzini <bonzini@redhat.com>
Subject: Re: CPU Lockups in KVM with deferred hrtimer rearming
Date: Wed, 22 Apr 2026 16:08:31 +0200 [thread overview]
Message-ID: <20260422140831.GR3102624@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <20260422074646.GO3126523@noisy.programming.kicks-ass.net>
On Wed, Apr 22, 2026 at 09:46:46AM +0200, Peter Zijlstra wrote:
> + instrumentation_begin();
> + /*
> + * KVM/VMX will dispatch from IRQ-disabled but for a context
> + * that will have IRQs-enabled. This confuses the entry code
> + * and it will not have reprogrammed the timer (or do
> + * preemption). Minimal fixup for now.
> + */
> + hrtimer_rearm_deferred();
> + instrumentation_end();
So I've been looking at this preemption thing. After having gotten my
head in a twist a few times around, I think this is done by
vcpu_enter_guest() like:
preempt_disable();
local_irq_disable();
...
kvm_x86_call(handle_exit_irqoff)(vcpu); <--- all of this VMX nonsense
...
local_irq_enable();
<--- WTF goes here :-)
++vcpu->stat.exits;
local_irq_disable();
...
local_irq_enable();
preempt_enable(); <--- here we finally preempt
This earlier IRQ-enable makes my head hurt and I had to go buy a new
WTF'o'meter (again!).
next prev parent reply other threads:[~2026-04-22 14:08 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-16 20:50 CPU Lockups in KVM with deferred hrtimer rearming Verma, Vishal L
2026-04-20 15:00 ` Thomas Gleixner
2026-04-20 15:22 ` Thomas Gleixner
2026-04-20 20:57 ` Verma, Vishal L
2026-04-20 22:19 ` Thomas Gleixner
2026-04-20 22:24 ` Verma, Vishal L
2026-04-21 6:29 ` Thomas Gleixner
2026-04-21 4:51 ` Binbin Wu
2026-04-21 7:39 ` Thomas Gleixner
2026-04-21 11:18 ` Peter Zijlstra
2026-04-21 11:32 ` Peter Zijlstra
2026-04-21 11:34 ` Peter Zijlstra
2026-04-21 11:49 ` Peter Zijlstra
2026-04-21 12:05 ` Peter Zijlstra
2026-04-21 13:19 ` Peter Zijlstra
2026-04-21 13:29 ` Peter Zijlstra
2026-04-21 16:36 ` Thomas Gleixner
2026-04-21 18:11 ` Verma, Vishal L
2026-04-21 17:11 ` Thomas Gleixner
2026-04-21 17:20 ` Jim Mattson
2026-04-21 18:29 ` Thomas Gleixner
2026-04-21 18:55 ` Sean Christopherson
2026-04-21 20:06 ` Peter Zijlstra
2026-04-21 20:46 ` Peter Zijlstra
2026-04-21 20:57 ` Sean Christopherson
2026-04-21 21:02 ` Peter Zijlstra
2026-04-21 21:42 ` Sean Christopherson
2026-04-22 6:55 ` Peter Zijlstra
2026-04-22 7:46 ` Peter Zijlstra
2026-04-22 14:08 ` Peter Zijlstra [this message]
2026-04-22 15:26 ` Sean Christopherson
2026-04-22 13:47 ` Sean Christopherson
2026-04-21 20:39 ` Paolo Bonzini
2026-04-21 21:02 ` Sean Christopherson
2026-04-21 22:48 ` Thomas Gleixner
2026-04-21 23:15 ` Paolo Bonzini
2026-04-21 23:34 ` Jim Mattson
2026-04-21 23:37 ` Paolo Bonzini
2026-04-22 2:10 ` Thomas Gleixner
2026-04-21 21:49 ` Thomas Gleixner
2026-04-21 22:07 ` Sean Christopherson
2026-04-21 22:24 ` Paolo Bonzini
2026-04-21 19:18 ` Verma, Vishal L
2026-04-21 16:30 ` Thomas Gleixner
2026-04-21 16:11 ` Verma, Vishal L
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