From: sashiko-bot@kernel.org
To: "Ewan Hai-oc" <ewanhai-oc@zhaoxin.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v3 2/5] KVM: x86: Expose Zhaoxin CCS (SM3 + SM4) CPUID feature
Date: Wed, 10 Jun 2026 02:42:59 +0000 [thread overview]
Message-ID: <20260610024300.127C21F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260610023512.3690734-3-ewanhai-oc@zhaoxin.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing synchronization of tools/arch/x86/include/asm/cpufeatures.h
--
commit 10214672b5ae87640bf83fed59682da6721698f8
Author: Ewan Hai-oc <ewanhai-oc@zhaoxin.com>
KVM: x86: Expose Zhaoxin CCS (SM3 + SM4) CPUID feature
This commit advertises the Zhaoxin CCS (Chinese Cryptography Standard)
feature to guests via CPUID 0xC0000001 EDX bits 4 and 5. It adds the
associated feature flags to the cpufeatures header and exposes them
in KVM CPUID initialization.
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 20b33413189c2..276e4ef90bd07 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -140,6 +140,8 @@
> #define X86_FEATURE_SM2_EN ( 5*32+ 1) /* "sm2_en" SM2 enabled */
> #define X86_FEATURE_XSTORE ( 5*32+ 2) /* "rng" RNG present (xstore) */
> #define X86_FEATURE_XSTORE_EN ( 5*32+ 3) /* "rng_en" RNG enabled */
> +#define X86_FEATURE_CCS ( 5*32+ 4) /* "ccs" SM3 + SM4 instructions */
> +#define X86_FEATURE_CCS_EN ( 5*32+ 5) /* "ccs_en" CCS enabled */
[Severity: Low]
Does this change also need to be synchronized to the tools tree copy at
tools/arch/x86/include/asm/cpufeatures.h?
Updating the main header without updating the tools copy usually triggers a
warning about differing kernel ABI headers during the compilation of tools
like perf or objtool. Is this omission a minor regression for the tools
build process?
> #define X86_FEATURE_XCRYPT ( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
> #define X86_FEATURE_XCRYPT_EN ( 5*32+ 7) /* "ace_en" on-CPU crypto enabled */
> #define X86_FEATURE_ACE2 ( 5*32+ 8) /* "ace2" Advanced Cryptography Engine v2 */
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260610023512.3690734-1-ewanhai-oc@zhaoxin.com?part=2
next prev parent reply other threads:[~2026-06-10 2:43 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-10 2:35 [PATCH v3 0/5] KVM: x86: Expose Zhaoxin CPUID 0xC0000001 EDX cryptographic features Ewan Hai-oc
2026-06-10 2:35 ` [PATCH v3 1/5] KVM: x86: Expose Zhaoxin SM2 CPUID feature Ewan Hai-oc
2026-06-10 2:43 ` sashiko-bot
2026-06-10 2:35 ` [PATCH v3 2/5] KVM: x86: Expose Zhaoxin CCS (SM3 + SM4) " Ewan Hai-oc
2026-06-10 2:42 ` sashiko-bot [this message]
2026-06-10 2:35 ` [PATCH v3 3/5] KVM: x86: Expose Zhaoxin RNG2 " Ewan Hai-oc
2026-06-10 2:44 ` sashiko-bot
2026-06-10 2:35 ` [PATCH v3 4/5] KVM: x86: Expose Zhaoxin PHE2 " Ewan Hai-oc
2026-06-10 2:45 ` sashiko-bot
2026-06-10 2:35 ` [PATCH v3 5/5] KVM: x86: Expose Zhaoxin RSA " Ewan Hai-oc
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