From: sashiko-bot@kernel.org
To: "Inochi Amaoto" <inochiama@gmail.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v5 7/8] RISC-V: KVM: Add support for control-flow integrity FWFT features
Date: Mon, 06 Jul 2026 02:42:02 +0000 [thread overview]
Message-ID: <20260706024203.5EED71F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260706022046.214956-8-inochiama@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Evaluating `this_cpu_ptr()` in a preemptible context via the `ncsr_write()` macro causes potential nested hypervisor state corruption.
--
commit 3bf03d5d2c60c30185d31cbc3e653f9c3b28377b
Author: Inochi Amaoto <inochiama@gmail.com>
RISC-V: KVM: Add support for control-flow integrity FWFT features
This commit adds support for exposing Control-Flow Integrity (CFI) FWFT
features (Zicfilp/Zicfiss) to VS-mode. It allows the VMM to control access
to these features by modifying the guest's henvcfg and hedeleg registers.
> diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c
> index 01db40b532951..bc514ae6521d7 100644
> --- a/arch/riscv/kvm/vcpu_sbi_fwft.c
> +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c
[ ... ]
> +static long kvm_sbi_fwft_set_cfi(struct kvm_vcpu *vcpu,
> + struct kvm_sbi_fwft_config *conf,
> + bool one_reg_access, unsigned long value,
> + u64 flag)
> +{
> + struct kvm_vcpu_config *cfg = &vcpu->arch.cfg;
> +
> + if (value == 0)
> + cfg->henvcfg &= ~flag;
> + else if (value == 1)
> + cfg->henvcfg |= flag;
> + else
> + return SBI_ERR_INVALID_PARAM;
> +
> + if (cfg->henvcfg & (ENVCFG_LPE | ENVCFG_SSE))
> + cfg->hedeleg |= BIT(EXC_SOFTWARE_CHECK);
> + else
> + cfg->hedeleg &= ~BIT(EXC_SOFTWARE_CHECK);
> +
> + if (!one_reg_access) {
> + ncsr_write(CSR_HEDELEG, cfg->hedeleg);
[Severity: High]
Is it safe to call ncsr_write() here with preemption enabled?
When a guest makes an SBI_EXT_FWFT_SET call, the KVM exit handler
(kvm_riscv_vcpu_exit) explicitly enables preemption before processing
the exit.
Looking at the ncsr_write() macro, it uses nacl_shmem() which evaluates
this_cpu_ptr():
#define ncsr_write(__csr, __val)
...
nacl_csr_write(nacl_shmem(), __csr, __val);
If the thread is preempted and migrated to another physical CPU between
evaluating the CPU pointer and performing the write, could this write to
the new CPU's view of the old CPU's memory?
This seems like it might corrupt the nested hypervisor state (like HEDELEG or
HENVCFG) of another running vCPU, as well as trigger CONFIG_DEBUG_PREEMPT
warnings.
> + /*
> + * Both Bit LPE and SSE are in the lower part, so it is safe
> + * to only write the henvcfg
> + */
> + ncsr_write(CSR_HENVCFG, vcpu->arch.cfg.henvcfg);
> + }
> +
> + return SBI_SUCCESS;
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260706022046.214956-1-inochiama@gmail.com?part=7
next prev parent reply other threads:[~2026-07-06 2:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 2:20 [PATCH v5 0/8] RISC-V: KVM: Add Svadu/Zicfiss/Zicfilp FWFT support Inochi Amaoto
2026-07-06 2:20 ` [PATCH v5 1/8] RISC-V: KVM: Add support for Svadu FWFT features Inochi Amaoto
2026-07-06 2:40 ` sashiko-bot
2026-07-06 2:20 ` [PATCH v5 2/8] KVM: riscv: selftests: add Svadu FWFT extension to get-reg-list test Inochi Amaoto
2026-07-06 2:20 ` [PATCH v5 3/8] RISC-V: KVM: Allow Zicfiss/Zicfilp extensions for Guest/VM Inochi Amaoto
2026-07-06 2:20 ` [PATCH v5 4/8] RISC-V: KVM: Add ssp context save/restore Inochi Amaoto
2026-07-06 2:20 ` [PATCH v5 5/8] RISC-V: KVM: Handle software-check exits for VCPU Inochi Amaoto
2026-07-06 2:20 ` [PATCH v5 6/8] RISC-V: KVM: Delegate SPELP bit to VS/VU mode if landing pad is enabled Inochi Amaoto
2026-07-06 2:20 ` [PATCH v5 7/8] RISC-V: KVM: Add support for control-flow integrity FWFT features Inochi Amaoto
2026-07-06 2:42 ` sashiko-bot [this message]
2026-07-06 2:20 ` [PATCH v5 8/8] KVM: riscv: selftests: add Zicfiss/Zicfilp extension to get-reg-list test Inochi Amaoto
2026-07-06 2:39 ` sashiko-bot
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