Re: [PATCH v8 7/8] KVM: x86/pmu: Emulate RDPMC on performance metrics

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Metrics Clear Mode is not emulated, causing guest application crashes (#GP) when RDPMC is intercepted.
--

--- Patch [7]: [PATCH v8 7/8] KVM: x86/pmu: Emulate RDPMC on performance metrics ---
commit 5022d9b3f098d7ca5a383495c52fb9e9c119df3b
Author: Zide Chen <zide.chen@intel.com>

KVM: x86/pmu: Emulate RDPMC on performance metrics

This commit adds emulation for RDPMC performance metrics when RDPMC
interception is enabled. It handles type 0x2000 but skips Metrics Clear Mode
for simplicity.

[ ... ]

> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index bbf4afcffafc8..3ca61e4b0ba68 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
[ ... ]
> @@ -125,6 +126,19 @@ static int intel_emulate_rdpmc(struct kvm_vcpu *vcpu, unsigned int idx,
>  		counters = pmu->gp_counters;
>  		num_counters = pmu->nr_arch_gp_counters;
>  		break;
> +	case INTEL_RDPMC_METRICS:
> +		if (!kvm_vcpu_has_perf_metrics(vcpu))
> +			return 1;
> +
> +		/*
> +		 * The index in ECX[15:0] is implementation specific, but no
> +		 * platform currently supports a non-zero index.
> +		 */
> +		if (idx)
> +			return 1;
> +
> +		*data = pmu->perf_metrics;
> +		return 0;
>  	default:
>  		return 1;

[Severity: Medium]
The commit message notes that Metrics Clear Mode is not supported for
simplicity. However, if a guest application uses Metrics Clear Mode (setting
bit 16 in ECX, making the type 0x20010000), it will fall through to this
default case since it doesn't match INTEL_RDPMC_METRICS.

Returning 1 here causes KVM to inject a #GP. Does this cause unexpected
crashes (like a SIGSEGV) for unprivileged guest userspace applications that
legitimately try to use this architecturally valid mode when RDPMC is
intercepted?

>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260817183143.226156-1-zide.chen@intel.com?part=7