From: fangyu.yu@linux.alibaba.com
To: andrew.jones@oss.qualcomm.com
Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu,
atish.patra@linux.dev, baolu.lu@linux.intel.com,
fangyu.yu@linux.alibaba.com, guoren@kernel.org,
iommu@lists.linux.dev, jgg@nvidia.com, jgg@ziepe.ca,
joro@8bytes.org, kevin.tian@intel.com,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
palmer@dabbelt.com, pjw@kernel.org, robin.murphy@arm.com,
skhawaja@google.com, tjeznach@rivosinc.com, vasant.hegde@amd.com,
will@kernel.org
Subject: Re: [RFC PATCH v2 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain
Date: Tue, 18 Aug 2026 22:03:40 +0800 [thread overview]
Message-ID: <20260818140340.48333-1-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <rzvdgmjkk5rzn4qehsoajmbak7jpssqancyn3mfvpnzf6wyvsc@alyg5a4c2scx>
>On Thu, May 07, 2026 at 07:37:03PM +0800, fangyu.yu@linux.alibaba.com wrote:
>...
>> + case IOMMU_HWPT_ALLOC_NEST_PARENT:
>> + case IOMMU_HWPT_ALLOC_DIRTY_TRACKING:
>> + case IOMMU_HWPT_ALLOC_DIRTY_TRACKING | IOMMU_HWPT_ALLOC_NEST_PARENT:
>> + /*
>> + * Second-stage (iohgatp) page table for KVM VFIO device
>> + * pass-through and dirty tracking. The GPA space is 2 bits
>> + * wider than the corresponding first-stage VA space (x4 root
>> + * page table), so hw_max_vasz_lg2 values are 41/50/59.
>> + */
>> + if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV57X4) {
>> + cfg.common.hw_max_vasz_lg2 = 59;
>> + } else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV48X4) {
>> + cfg.common.hw_max_vasz_lg2 = 50;
>> + } else if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SV39X4) {
>> + cfg.common.hw_max_vasz_lg2 = 41;
>> + } else {
>> + ret = -ENODEV;
>> + goto err_free;
>> + }
>> + domain->gscid = ida_alloc_range(&riscv_iommu_gscids, 1,
>> + RISCV_IOMMU_MAX_GSCID, GFP_KERNEL);
>> + if (domain->gscid < 0) {
>> + ret = -ENOMEM;
>> + goto err_free;
>> + }
>> + cfg.common.features |= BIT(PT_FEAT_RISCV_S2);
>
>cfg.common.features currently has PT_FEAT_SIGN_EXTEND which isn't correct
>for the second stage. So it needs to removed and then added back in for
>the first stage. riscv_64_kunit_fmt_cfgs[] in the kunit test will then
>need to also be updated.
Thanks, agreed. PT_FEAT_SIGN_EXTEND is only valid for first-stage
VA translation and should not be inherited by iohgatp domains. I'll move
PT_FEAT_SIGN_EXTEND into the first-stage allocation path, leave second-stage
domains with PT_FEAT_RISCV_S2 only, and update the RISC-V KUnit configs
accordingly in next version.
>
>Thanks,
>drew
next prev parent reply other threads:[~2026-08-18 14:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-07 11:36 [RFC PATCH v2 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains fangyu.yu
2026-05-07 11:36 ` [RFC PATCH v2 01/10] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-08-18 9:30 ` Andrew Jones
2026-08-18 12:59 ` fangyu.yu
2026-05-07 11:36 ` [RFC PATCH v2 02/10] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-05-07 11:36 ` [RFC PATCH v2 03/10] iommu/riscv: report iommu capabilities fangyu.yu
2026-05-07 11:37 ` [RFC PATCH v2 04/10] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-05-07 11:37 ` [RFC PATCH v2 05/10] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-08-18 10:59 ` Andrew Jones
2026-08-18 13:34 ` fangyu.yu
2026-05-07 11:37 ` [RFC PATCH v2 06/10] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-05-07 11:37 ` [RFC PATCH v2 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-08-18 11:05 ` Andrew Jones
2026-08-18 14:03 ` fangyu.yu [this message]
2026-05-07 11:37 ` [RFC PATCH v2 08/10] iommu/riscv: Pre-enable GADE for second-stage domains fangyu.yu
2026-05-07 11:37 ` [RFC PATCH v2 09/10] iommu/riscv: Add dirty tracking support " fangyu.yu
2026-05-07 11:37 ` [RFC PATCH v2 10/10] iommu/riscv: Add IOTINVAL.GVMA after updating DDT/PDT entries fangyu.yu
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