Re: [PATCH 2/2] KVM: selftests: arm64: Add 52-bit VA guest modes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect TTBR0_EL1 base address encoding for FEAT_LPA2 (4K/16K pages) with 52-bit physical addresses.
--

commit 7fa14109ad0da6af47dd28e3d16f9d1ca4d12232
Author: Itaru Kitayama <itaru.kitayama@fujitsu.com>

KVM: selftests: arm64: Add 52-bit VA guest modes

This commit adds P52V52 guest mode IDs for 4K, 16K, and 64K translation
granules. It advertises the 4KB and 16KB modes when the corresponding
granule supports a 52-bit IPA, and additionally requires 52-bit VA support
for the 64K mode.

> diff --git a/tools/testing/selftests/kvm/lib/guest_modes.c b/tools/testing/selftests/kvm/lib/guest_modes.c
> index 7a96c43b5704d..4f121e2987e9a 100644
> --- a/tools/testing/selftests/kvm/lib/guest_modes.c
> +++ b/tools/testing/selftests/kvm/lib/guest_modes.c
> @@ -21,10 +21,15 @@ void guest_modes_append_default(void)
>  	{
>  		unsigned int limit = kvm_check_cap(KVM_CAP_ARM_VM_IPA_SIZE);
>  		u32 ipa4k, ipa16k, ipa64k;
> +		u32 va;
>  		int i;
>  
>  		aarch64_get_supported_page_sizes(limit, &ipa4k, &ipa16k, &ipa64k);
> +		va = aarch64_get_supported_va_size();
>  
> +		guest_mode_append(VM_MODE_P52V52_4K, ipa4k >= 52);
> +		guest_mode_append(VM_MODE_P52V52_16K, ipa16k >= 52);

[Severity: Medium]
Will this corrupt the TTBR0_EL1 base address for FEAT_LPA2 (4K/16K pages)
guests with 52-bit physical addresses?

When a VM is created with the newly added VM_MODE_P52V52_4K or
VM_MODE_P52V52_16K modes, aarch64_vcpu_setup() configures TTBR0_EL1:

tools/testing/selftests/kvm/lib/arm64/processor.c:aarch64_vcpu_setup() {
	...
	switch (vm->mode) {
	case VM_MODE_P52V52_4K:
	case VM_MODE_P52V52_16K:
	case VM_MODE_P52V52_64K:
	case VM_MODE_P52V48_4K:
	case VM_MODE_P52V48_16K:
	case VM_MODE_P52V48_64K:
		tcr_el1 |= TCR_IPS_52_BITS;
		ttbr0_el1 |= FIELD_GET(GENMASK(51, 48), vm->mmu.pgd) << 2;
		break;
	...
}

Because TCR_EL1.DS is set for these LPA2 modes, the hardware expects the base
address directly in bits [51:x].

However, the code above incorrectly applies the 64K (FEAT_LVA) format instead,
masking out bits 51:48 and shifting them into bits 5:2.

Can this cause a translation fault if the root page table is allocated
above 256TB?

> +		guest_mode_append(VM_MODE_P52V52_64K, ipa64k >= 52 && va >= 52);
>  		guest_mode_append(VM_MODE_P52V48_4K, ipa4k >= 52);
>  		guest_mode_append(VM_MODE_P52V48_16K, ipa16k >= 52);
>  		guest_mode_append(VM_MODE_P52V48_64K, ipa64k >= 52);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260826-arm64-52bit-va-v1-0-14ec98211363@fujitsu.com?part=2