Re: [kvm-unit-tests PATCH] x86: fix ept_access_test_paddr exit qualifications

[Paolo Bonzini <pbonzini@redhat.com>]

On 05/05/2017 22:57, David Matlack wrote:
> SDM Volume 3, Section 28.2.3.2 EPT Violations:
> Reads by the logical processor of guest paging structures to translate a
> linear address are considered to be data reads.

This is for A/D bits disabled.

> SDM Volume 3, Table 27-7, Footnote 1:
> If A/D flags for EPT are enabled, accesses to guest paging-structure
> entries are treated as writes with regard to EPT Violations. If such an
> access causes an EPT violation, the processor sets both bit 0 and bit 1
> of the exit qualification.

This is for A/D enabled.

>  static void ept_access_test_paddr_read_only_ad_disabled(void)
>  {
> -	u64 qual = EPT_VLT_WR | EPT_VLT_PERM_RD;
> +	u64 qual = EPT_VLT_WR | EPT_VLT_RD | EPT_VLT_PERM_RD;
>  
>  	ept_access_test_setup();
>  	ept_disable_ad_bits();
> @@ -2754,7 +2756,7 @@ static void ept_access_test_paddr_read_write_execute(void)
>  
>  static void ept_access_test_paddr_read_execute_ad_disabled(void)
>  {
> -	u64 qual = EPT_VLT_WR | EPT_VLT_PERM_RD | EPT_VLT_PERM_EX;
> +	u64 qual = EPT_VLT_WR | EPT_VLT_RD | EPT_VLT_PERM_RD | EPT_VLT_PERM_EX;
>  
>  	ept_access_test_setup();
>  	ept_disable_ad_bits();

So I think these should use EPT_VLT_RD only.

Paolo