From: Dave Hansen <dave.hansen@intel.com>
To: Yin Fengwei <fengwei.yin@intel.com>, Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Zixi Chen <zixchen@redhat.com>, Adam Dunlap <acdunlap@google.com>,
"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Kai Huang <kai.huang@intel.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>,
x86@kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or TME
Date: Mon, 26 Feb 2024 08:21:23 -0800 [thread overview]
Message-ID: <3807c397-2eef-4f1d-ae85-4259f061f08e@intel.com> (raw)
In-Reply-To: <7e118d89-3b7a-4e13-b3de-2acfbf712ad5@intel.com>
On 2/25/24 17:57, Yin Fengwei wrote:
> On 2/23/24 02:08, Paolo Bonzini wrote:
>> On Thu, Feb 22, 2024 at 7:07 PM Dave Hansen <dave.hansen@intel.com> wrote:
>>>> Ping, in the end are we applying these patches for either 6.8 or 6.9?
>>> Let me poke at them and see if we can stick them in x86/urgent early
>>> next week. They do fix an actual bug that's biting people, right?
>> Yes, I have gotten reports of {Sapphire,Emerald} Rapids machines that
>> don't boot at all without either these patches or
>> "disable_mtrr_cleanup".
> We tried platform other than Sapphire and Emerald. This patchset can fix
> boot issues on that platform also.
Fengwei, could you also test this series on the troublesome hardware,
please?
> https://lore.kernel.org/all/20240222183926.517AFCD2@davehans-spike.ostc.intel.com/
If it _also_ fixes the problem, it'll be a strong indication that it's
the right long-term approach.
next prev parent reply other threads:[~2024-02-26 16:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-31 23:09 [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or TME Paolo Bonzini
2024-01-31 23:09 ` [PATCH v2 1/2] x86/cpu: allow reducing x86_phys_bits during early_identify_cpu() Paolo Bonzini
2024-02-01 8:33 ` Kirill A . Shutemov
2024-02-01 15:44 ` Huang, Kai
2024-01-31 23:09 ` [PATCH v2 2/2] x86/cpu/intel: Detect TME keyid bits before setting MTRR mask registers Paolo Bonzini
2024-02-01 8:34 ` Kirill A . Shutemov
2024-02-01 15:42 ` Huang, Kai
2024-02-01 18:29 ` [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or TME Dave Hansen
2024-02-01 21:42 ` Dave Hansen
2024-02-01 23:08 ` Paolo Bonzini
2024-02-04 17:21 ` Paolo Bonzini
2024-02-13 15:45 ` Paolo Bonzini
2024-02-13 22:02 ` Dave Hansen
2024-02-13 22:25 ` Paolo Bonzini
2024-02-20 12:22 ` Paolo Bonzini
2024-02-22 18:06 ` Dave Hansen
2024-02-22 18:08 ` Paolo Bonzini
2024-02-26 1:57 ` Yin Fengwei
2024-02-26 16:21 ` Dave Hansen [this message]
2024-02-27 2:02 ` Yin Fengwei
2024-02-27 6:08 ` Yin Fengwei
2024-02-27 13:30 ` Dave Hansen
2024-02-28 0:07 ` Yin Fengwei
2024-02-13 17:07 ` Dave Hansen
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