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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Avi Kivity <avi@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Subject: Re: [PATCH] KVM: VMX: Conditionally reload debug register 6
Date: Tue, 01 Sep 2009 14:32:11 +0200	[thread overview]
Message-ID: <4A9D144B.1020807@siemens.com> (raw)
In-Reply-To: <4A9D0B47.20805@redhat.com>

Avi Kivity wrote:
> On 09/01/2009 02:43 PM, Jan Kiszka wrote:
>> @@ -3731,7 +3732,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
>>>   				| (1<<  VCPU_EXREG_PDPTR));
>>>   	vcpu->arch.regs_dirty = 0;
>>>
>>> -	get_debugreg(vcpu->arch.dr6, 6);
>>> +	if (vcpu->arch.switch_db_regs)
>>> +		get_debugreg(vcpu->arch.dr6, 6);
>>>
>>>   	vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
>>>   	if (vmx->rmode.irq.pending)
>>>      
>> That reduces the emulation quality as vcpu->arch.switch_db_regs is only
>> set if some breakpoint is active while dr6 has its use also when that is
>> not the case).
>>    
> 
> True - there's the TF reason reporting bits.
> 
> How about this then:
> 
> - if !switch_db_regs, trap #DB
> - on #DB trap, copy DR6.BS and DR6.BT to vcpu->arch.dr6, and reinject 
> the #DB
> 
> ?

I'm worried about vm-exits that may take precedence over the #db trap.
If we skip to save/restore dr6 for them, the value that the interception
handler sees later on will be bogus. Or is this architecturally impossible?

Jan

-- 
Siemens AG, Corporate Technology, CT SE 2
Corporate Competence Center Embedded Linux

  reply	other threads:[~2009-09-01 12:32 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-09-01 11:40 [PATCH] KVM: VMX: Conditionally reload debug register 6 Avi Kivity
2009-09-01 11:43 ` Jan Kiszka
2009-09-01 11:53   ` Avi Kivity
2009-09-01 12:32     ` Jan Kiszka [this message]
2009-09-01 12:54       ` Avi Kivity

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