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From: "Nikunj A. Dadhania" <nikunj@amd.com>
To: Sean Christopherson <seanjc@google.com>, Yosry Ahmed <yosry@kernel.org>
Cc: <kvm@vger.kernel.org>, <pbonzini@redhat.com>,
	<thomas.lendacky@amd.com>, <bp@alien8.de>,
	<joao.m.martins@oracle.com>, <kai.huang@intel.com>
Subject: Re: [PATCH v6 7/7] KVM: SVM: Add Page modification logging support
Date: Wed, 22 Apr 2026 11:56:43 +0530	[thread overview]
Message-ID: <4c977b79-e93d-4846-b57d-e63ac878dc5b@amd.com> (raw)
In-Reply-To: <aegFDBWMUvhR53c1@google.com>



On 4/22/2026 4:45 AM, Sean Christopherson wrote:
> On Tue, Apr 21, 2026, Yosry Ahmed wrote:
>>> @@ -3253,6 +3278,54 @@ static int bus_lock_exit(struct kvm_vcpu *vcpu)
>>>  	return 0;
>>>  }
>>>  
>>> +void svm_update_cpu_dirty_logging(struct kvm_vcpu *vcpu)
>>> +{
>>> +	struct vcpu_svm *svm = to_svm(vcpu);
>>> +
>>> +	if (WARN_ON_ONCE(!vcpu->kvm->arch.cpu_dirty_log_size))
>>> +		return;
>>> +
>>> +	guard(svm_vmcb01)(vcpu);
>>
>> Why do we need this? Why not update vmcb01 directly below?

Are you suggesting something like below:

void svm_update_cpu_dirty_logging(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	struct vmcb *vmcb01 = svm->vmcb01.ptr;

	if (WARN_ON_ONCE(!vcpu->kvm->arch.cpu_dirty_log_size))
		return;

	/*
	 * Note, nr_memslots_dirty_logging can be changed concurrent with this
	 * code, but in that case another update request will be made and so
	 * the guest will never run with a stale PML value.
	 */
	if (atomic_read(&vcpu->kvm->nr_memslots_dirty_logging))
		vmcb01->control.nested_ctl |= SVM_NESTED_CTL_PML_ENABLE;
	else
		vmcb01->control.nested_ctl &= ~SVM_NESTED_CTL_PML_ENABLE;

	vmcb_mark_dirty(vmcb01, VMCB_NPT);
}

> 
> Yeah, I don't see the point of patch 6.  guard(svm_vmcb01) doesn't exist in the
> current code base because it's not needed.

Sure, I can drop patch6. I wanted to keep the code similar.

> 
>> IIUC VMX needs this because it updates the loaded VMCS, but the VMCB is
>> just memory.
> 
> Yep.  If VMWRITE could target an arbitrary VMCS pointer, VMX wouldn't need the
> helper either.

Regards
Nikunj

      reply	other threads:[~2026-04-22  6:26 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-07  6:32 [PATCH v6 0/7] KVM: SVM: Add Page Modification Logging (PML) support Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 1/7] KVM: x86: Carve out PML flush routine Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 2/7] KVM: x86: Move PML page to common vcpu arch structure Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 3/7] KVM: VMX: Use cpu_dirty_log_size instead of enable_pml for PML checks Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 4/7] x86/cpufeatures: Add Page modification logging Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 5/7] KVM: SVM: Use BIT_ULL for 64-bit nested_ctl bit definitions Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 6/7] KVM: nSVM: Add helpers to temporarily switch to vmcb01 Nikunj A Dadhania
2026-04-07  6:32 ` [PATCH v6 7/7] KVM: SVM: Add Page modification logging support Nikunj A Dadhania
2026-04-20  6:38   ` Nikunj A. Dadhania
2026-04-21 15:08     ` Sean Christopherson
2026-04-21 23:50       ` Huang, Kai
2026-04-22  0:30         ` Sean Christopherson
2026-04-22  1:42           ` Huang, Kai
2026-04-22  5:59             ` Nikunj A. Dadhania
2026-04-21 23:04   ` Yosry Ahmed
2026-04-21 23:15     ` Sean Christopherson
2026-04-22  6:26       ` Nikunj A. Dadhania [this message]

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