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From: Binbin Wu <binbin.wu@linux.intel.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	x86@kernel.org, pbonzini@redhat.com, seanjc@google.com,
	dave.hansen@intel.com, kas@kernel.org,
	rick.p.edgecombe@intel.com, vishal.l.verma@intel.com,
	chao.gao@intel.com
Subject: Re: [PATCH 2/2] x86/cpu: Skip reading MSR_IA32_PLATFORM_ID in virtualized environment
Date: Tue, 28 Apr 2026 17:57:01 +0800	[thread overview]
Message-ID: <59bcc3d3-1a6f-47e0-86af-3cb5b08cbacb@linux.intel.com> (raw)
In-Reply-To: <36c64a53-0041-4638-b6cd-7deff38bd37d@intel.com>



On 4/28/2026 2:01 PM, Xiaoyao Li wrote:
[...]

>> diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
>> index 37ac4afe0972..cb93e4ea410e 100644
>> --- a/arch/x86/kernel/cpu/microcode/intel.c
>> +++ b/arch/x86/kernel/cpu/microcode/intel.c
>> @@ -147,6 +147,10 @@ u32 intel_get_platform_id(void)
>>       if (intel_cpuid_vfm() <= INTEL_PENTIUM_II_KLAMATH)
>>           return 0;
>>   +    /* Don't try to read microcode bits when virtualized. */
> 
> The platform ID is not only used by microcode update. I don't think calling them microcode bits is proper. It's also stashed in struct cpuinfo_x86::intel_platform_id and used in x86_match_cpu() as a factor as the generic FMS (Family, Model, Stepping) bits.

It's still related to microcode though.
The platform id is used to detect whether the microcode is old or not in this
case.

> 
> We skip things due to hypervisor is set usually when the thing is known unable to be virtualized. From the perspective of microcode update, it's OK to skip reading it due to hypervisor bit. However, from the perspective of generic platform ID, it seems not that reasonable to skip reading it due to hypervisor bit. Especially KVM has supported this MSR for normal VMs.

Considering the microcode related code, Linux kernel does special handling when
running as a guest, microcode_loader_disabled() sets dis_ucode_ldr and
cpu_has_old_microcode() also skips to check whether the microcode is old
if it's running in a virtualized environment. I.e. the special handling for
virtualization make it meaningless to read the MSR.

> 
> So how about using the safe version of RDMSR, if we want the enhancement?

I am open to this.
Let's wait to see if the change on guest side is wanted or not.

> 
>> +    if (x86_cpuid_has_hypervisor())
>> +        return 0;
>> +
>>       /* get processor flags from MSR 0x17 */
>>       native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
>>   diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h
>> index 3b93c0676b4f..0233e074d76b 100644
>> --- a/arch/x86/kernel/cpu/microcode/internal.h
>> +++ b/arch/x86/kernel/cpu/microcode/internal.h
>> @@ -100,6 +100,11 @@ static inline unsigned int x86_cpuid_family(void)
>>       return x86_family(eax);
>>   }
>>   +static inline bool x86_cpuid_has_hypervisor(void)
>> +{
>> +    return native_cpuid_ecx(1) & BIT(31);
>> +}
>> +
>>   extern bool force_minrev;
>>     #ifdef CONFIG_CPU_SUP_AMD
> 
> 


  reply	other threads:[~2026-04-28  9:57 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-28  2:47 [PATCH 0/2] Fix MSR_IA32_PLATFORM_ID access for TDX guests Binbin Wu
2026-04-28  2:47 ` [PATCH 1/2] KVM: TDX: Allow TDs to read MSR_IA32_PLATFORM_ID Binbin Wu
2026-04-28  5:31   ` Xiaoyao Li
2026-04-28 11:44   ` Chao Gao
2026-04-28 16:30     ` Sean Christopherson
2026-04-28 18:31       ` Edgecombe, Rick P
2026-04-28 18:44         ` Sean Christopherson
2026-04-28 19:28           ` Edgecombe, Rick P
2026-04-28 18:49   ` Dave Hansen
2026-04-28  2:47 ` [PATCH 2/2] x86/cpu: Skip reading MSR_IA32_PLATFORM_ID in virtualized environment Binbin Wu
2026-04-28  6:01   ` Xiaoyao Li
2026-04-28  9:57     ` Binbin Wu [this message]
2026-04-28 18:54     ` Edgecombe, Rick P
2026-04-28 19:13       ` Dave Hansen

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