From: Marc Zyngier <maz@kernel.org>
To: sashiko-reviews@lists.linux.dev
Cc: kvm@vger.kernel.org, "Oliver Upton" <oupton@kernel.org>,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v3 11/28] KVM: arm64: Expose FEAT_NV2p1 to NV guests
Date: Wed, 22 Jul 2026 10:01:05 +0100 [thread overview]
Message-ID: <86o6fze6um.wl-maz@kernel.org> (raw)
In-Reply-To: <20260722083253.1F3351F000E9@smtp.kernel.org>
On Wed, 22 Jul 2026 09:32:52 +0100,
sashiko-bot@kernel.org wrote:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] The ARM64_HAS_NV2P1 CPU feature capability is checked dynamically to enable FEAT_NV2p1 logic in KVM, but the capability is never registered in the kernel's CPU feature framework, rendering the new feature entirely dead code.
> --
>
> --- Patch [11]: [PATCH v3 11/28] KVM: arm64: Expose FEAT_NV2p1 to NV guests ---
> commit 2bb48d2c7459805b9d877b250f95afb9c6786a43
> Author: Marc Zyngier <maz@kernel.org>
>
> KVM: arm64: Expose FEAT_NV2p1 to NV guests
>
> This commit exposes the FEAT_NV2p1 feature to nested virtualization guests by
> updating the ID_AA64MMFR4_EL1 register limits when the hardware capability is
> present. This intends to reduce the number of traps for NV guests.
>
> > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> > index fb54f6dad995c..82be8bcb07035 100644
> > --- a/arch/arm64/kvm/nested.c
> > +++ b/arch/arm64/kvm/nested.c
> [ ... ]
> > @@ -1738,7 +1738,11 @@ u64 limit_nv_id_reg(struct kvm *kvm, u32 reg, u64 val)
> > if (test_bit(KVM_ARM_VCPU_HAS_EL2_E2H0, kvm->arch.vcpu_features)) {
> > val = 0;
> > } else {
> > - val = SYS_FIELD_PREP_ENUM(ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY);
> > + val &= ID_AA64MMFR4_EL1_NV_frac;
> > + if (cpus_have_final_cap(ARM64_HAS_NV2P1))
>
> [Severity: Medium]
> Is ARM64_HAS_NV2P1 registered in the kernel's CPU feature framework?
>
> It appears that the ARM64_HAS_NV2P1 capability is missing from the
> arm64_features array in arch/arm64/kernel/cpufeature.c. Because it is not
> mapped to a hardware ID register field, this capability check in
> limit_nv_id_reg() will always evaluate to false.
>
> Does this render the newly added FEAT_NV2p1 support unreachable?
See follow-up patch.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2026-07-22 9:01 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-22 7:42 [PATCH v3 00/28] KVM: arm64: Add support for FEAT_NV2p1 and FEAT_NV3 Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 01/28] arm64: sysreg: Emit RESx/UNKN values for Mapping/Fields definitions Marc Zyngier
2026-07-22 7:55 ` sashiko-bot
2026-07-22 9:05 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 02/28] arm64: Update ID_AA64MMFR4_EL1 description to 2026-03 JSON release Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 03/28] KVM: arm64: Merge guest's HCRX_EL2 using NV_HCRX_GUEST_EXCLUDE Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 04/28] KVM: arm64: Drop __HCRX_EL2_* masks Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 05/28] KVM: arm64: Plumb HCRX_EL2.SRMASKEn in HCRX_EL2 sanitisation Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 06/28] KVM: arm64: Classify CPTR_EL2 as a SR_LOC_SPECIAL register Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 07/28] KVM: arm64: Don't evaluate HCR_EL2.NV nor HFGITR_EL2.ERET on ERET fast path Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 08/28] arm64: Add ARM64_HAS_NV2P1 capability Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 09/28] KVM: arm64: Relax CPTR_EL2 handling when FEAT_NV2p1 is present Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 10/28] KVM: arm64: Relax CNTHCTL_EL2 " Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 11/28] KVM: arm64: Expose FEAT_NV2p1 to NV guests Marc Zyngier
2026-07-22 8:32 ` sashiko-bot
2026-07-22 9:01 ` Marc Zyngier [this message]
2026-07-22 7:42 ` [PATCH v3 12/28] arm64: Add FEAT_NV2p1 detection Marc Zyngier
2026-07-22 8:13 ` sashiko-bot
2026-07-22 8:57 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 13/28] arm64: sysreg: Add NVHCR_EL2 description as a mirror of HCR_EL2 Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 14/28] arm64: sysreg: Add HCRX_EL2 bits related to FEAT_NV3 Marc Zyngier
2026-07-22 8:11 ` sashiko-bot
2026-07-22 8:56 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 15/28] arm64: Add ARM64_HAS_NV3 capability Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 16/28] KVM: arm64: Split NV-specific exit fixups from the non-NV handling Marc Zyngier
2026-07-22 8:23 ` sashiko-bot
2026-07-22 9:08 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 17/28] KVM: arm64: Add NV3 control bits to HCRX_EL2 sanitisation Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 18/28] KVM: arm64: Add kvm_has_nv{2,3}() predicates Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 19/28] KVM: arm64: Make HCR_EL2 a non-VNCR register Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 20/28] KVM: arm64: Add sanitisation for NVHCR_EL2 Marc Zyngier
2026-07-22 8:38 ` sashiko-bot
2026-07-22 9:11 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 21/28] KVM: arm64: Add NVHCR_EL2 handling to the sysreg array Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 22/28] KVM: arm64: Add routing for NVHCR_EL2 trap Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 23/28] KVM: arm64: Add NVHCR_EL2 context switching Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 24/28] KVM: arm64: Engage NV3 ERET trap elision Marc Zyngier
2026-07-22 8:50 ` sashiko-bot
2026-07-22 9:16 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 25/28] KVM: arm64: Engage NV3 TLBI " Marc Zyngier
2026-07-22 8:57 ` sashiko-bot
2026-07-22 9:04 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 26/28] KVM: arm64: Add FEAT_NV3 detection Marc Zyngier
2026-07-22 8:53 ` sashiko-bot
2026-07-22 9:04 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 27/28] KVM: arm64: Expose FEAT_NV3 to guests Marc Zyngier
2026-07-22 9:06 ` sashiko-bot
2026-07-22 9:18 ` Marc Zyngier
2026-07-22 7:42 ` [PATCH v3 28/28] arm64: Add override for ID_AA64MMFR4_EL1.NV_frac Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=86o6fze6um.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=oupton@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox