From: Thomas Gleixner <tglx@linutronix.de>
To: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>, linux-kernel@vger.kernel.org
Cc: bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com,
Thomas.Lendacky@amd.com, nikunj@amd.com, Santosh.Shukla@amd.com,
Vasant.Hegde@amd.com, Suravee.Suthikulpanit@amd.com,
David.Kaplan@amd.com, x86@kernel.org, hpa@zytor.com,
peterz@infradead.org, seanjc@google.com, pbonzini@redhat.com,
kvm@vger.kernel.org, kirill.shutemov@linux.intel.com,
huibo.wang@amd.com, naveen.rao@amd.com,
francescolavra.fl@gmail.com
Subject: Re: [PATCH v3 06/17] x86/apic: Add support to send IPI for Secure AVIC
Date: Thu, 03 Apr 2025 13:45:35 +0200 [thread overview]
Message-ID: <87y0whv57k.ffs@tglx> (raw)
In-Reply-To: <20250401113616.204203-7-Neeraj.Upadhyay@amd.com>
On Tue, Apr 01 2025 at 17:06, Neeraj Upadhyay wrote:
> --- a/arch/x86/kernel/apic/x2apic_savic.c
> +++ b/arch/x86/kernel/apic/x2apic_savic.c
> @@ -46,6 +46,25 @@ static __always_inline void set_reg(unsigned int offset, u32 val)
>
> #define SAVIC_ALLOWED_IRR 0x204
>
> +static inline void update_vector(unsigned int cpu, unsigned int offset,
> + unsigned int vector, bool set)
Why aren't you placing that function right away there instead of adding
it first somewhere else and then shuffle it around?
> -static void __send_ipi_mask(const struct cpumask *mask, int vector, bool excl_self)
> +static void send_ipi_mask(const struct cpumask *mask, unsigned int vector, bool excl_self)
> {
> - unsigned long query_cpu;
> - unsigned long this_cpu;
> + unsigned int this_cpu;
> + unsigned int cpu;
Again. Do it right in the first place and not later. Same for the
underscores of the function name.
next prev parent reply other threads:[~2025-04-03 11:45 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-01 11:35 [PATCH v3 00/17] AMD: Add Secure AVIC Guest Support Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 01/17] x86/apic: Add new driver for Secure AVIC Neeraj Upadhyay
2025-04-03 11:34 ` Thomas Gleixner
2025-04-03 11:42 ` Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 02/17] x86/apic: Initialize Secure AVIC APIC backing page Neeraj Upadhyay
2025-04-03 11:37 ` Thomas Gleixner
2025-04-03 11:44 ` Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 03/17] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 04/17] x86/apic: Initialize APIC ID for Secure AVIC Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 05/17] x86/apic: Add update_vector callback " Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 06/17] x86/apic: Add support to send IPI " Neeraj Upadhyay
2025-04-03 11:45 ` Thomas Gleixner [this message]
2025-04-03 11:58 ` Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 07/17] x86/apic: Support LAPIC timer " Neeraj Upadhyay
2025-04-03 12:13 ` Thomas Gleixner
2025-04-03 12:36 ` Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 08/17] x86/sev: Initialize VGIF for secondary VCPUs " Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 09/17] x86/apic: Add support to send NMI IPI " Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 10/17] x86/apic: Allow NMI to be injected from hypervisor " Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 11/17] x86/sev: Enable NMI support " Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 12/17] x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests Neeraj Upadhyay
2025-04-14 23:57 ` Liz Jordan
2025-04-01 11:36 ` [PATCH v3 13/17] x86/apic: Handle EOI writes " Neeraj Upadhyay
2025-04-07 15:45 ` Sean Christopherson
2025-04-07 16:19 ` Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 14/17] x86/apic: Add kexec support for Secure AVIC Neeraj Upadhyay
2025-04-11 17:01 ` Francesco Lavra
2025-04-01 11:36 ` [PATCH v3 15/17] x86/apic: Enable Secure AVIC in Control MSR Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 16/17] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests Neeraj Upadhyay
2025-04-01 11:36 ` [PATCH v3 17/17] x86/sev: Indicate SEV-SNP guest supports Secure AVIC Neeraj Upadhyay
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