From: Chao Gao <chao.gao@intel.com>
To: Robert Hoo <robert.hu@linux.intel.com>
Cc: <seanjc@google.com>, <pbonzini@redhat.com>,
<binbin.wu@linux.intel.com>, <kvm@vger.kernel.org>
Subject: Re: [PATCH v5 1/5] KVM: x86: Virtualize CR4.LAM_SUP
Date: Thu, 2 Mar 2023 15:17:36 +0800 [thread overview]
Message-ID: <ZABNkFpypTK5tvYW@gao-cwp> (raw)
In-Reply-To: <20230227084547.404871-2-robert.hu@linux.intel.com>
On Mon, Feb 27, 2023 at 04:45:43PM +0800, Robert Hoo wrote:
>LAM feature uses CR4 bit[28] (LAM_SUP) to enable/config LAM masking on
>supervisor mode address. To virtualize that, move CR4.LAM_SUP out of
>unconditional CR4_RESERVED_BITS; its reservation now depends on vCPU has
>LAM feature or not.
>
>Not passing through to guest but intercept it, is to avoid read VMCS field
>every time when KVM fetch its value, with expectation that guest won't
>toggle this bit frequently.
>
>There's no other features/vmx_exec_controls connections, therefore no code
>need to be complemented in kvm/vmx_set_cr4().
>
>Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
>---
> arch/x86/include/asm/kvm_host.h | 3 ++-
> arch/x86/kvm/x86.h | 2 ++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
>diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>index f35f1ff4427b..4684896698f4 100644
>--- a/arch/x86/include/asm/kvm_host.h
>+++ b/arch/x86/include/asm/kvm_host.h
>@@ -125,7 +125,8 @@
> | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
> | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
> | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
>- | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
>+ | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
>+ | X86_CR4_LAM_SUP))
>
> #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
>
>diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
>index 9de72586f406..8ec5cc983062 100644
>--- a/arch/x86/kvm/x86.h
>+++ b/arch/x86/kvm/x86.h
>@@ -475,6 +475,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
> __reserved_bits |= X86_CR4_VMXE; \
> if (!__cpu_has(__c, X86_FEATURE_PCID)) \
> __reserved_bits |= X86_CR4_PCIDE; \
>+ if (!__cpu_has(__c, X86_FEATURE_LAM)) \
>+ __reserved_bits |= X86_CR4_LAM_SUP; \
> __reserved_bits; \
> })
Add X86_CR4_LAM_SUP to cr4_fixed1 in nested_vmx_cr_fixed1_bits_update()
to indicate CR4.LAM_SUP is allowed to be 0 or 1 in VMX operation.
With this fixed,
Reviewed-by: Chao Gao <chao.gao@intel.com>
next prev parent reply other threads:[~2023-03-02 7:17 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-27 8:45 [PATCH v5 0/5] Linear Address Masking (LAM) KVM Enabling Robert Hoo
2023-02-27 8:45 ` [PATCH v5 1/5] KVM: x86: Virtualize CR4.LAM_SUP Robert Hoo
2023-03-02 7:17 ` Chao Gao [this message]
2023-03-02 12:03 ` Binbin Wu
2023-03-02 13:00 ` Robert Hoo
2023-02-27 8:45 ` [PATCH v5 2/5] [Trivial]KVM: x86: Explicitly cast ulong to bool in kvm_set_cr3() Robert Hoo
2023-03-02 7:24 ` Chao Gao
2023-03-03 3:23 ` Robert Hoo
2023-03-10 20:22 ` Sean Christopherson
2023-03-20 12:05 ` Binbin Wu
2023-03-20 13:56 ` Binbin Wu
2023-03-21 16:03 ` Sean Christopherson
2023-02-27 8:45 ` [PATCH v5 3/5] KVM: x86: Virtualize CR3.LAM_{U48,U57} Robert Hoo
2023-03-03 6:21 ` Chao Gao
2023-03-03 14:23 ` Robert Hoo
2023-03-03 15:53 ` Chao Gao
2023-03-05 1:31 ` Robert Hoo
2023-03-10 20:12 ` Sean Christopherson
2023-03-20 6:57 ` Binbin Wu
2023-02-27 8:45 ` [PATCH v5 4/5] KVM: x86: emulation: Apply LAM mask when emulating data access in 64-bit mode Robert Hoo
2023-03-02 6:41 ` Binbin Wu
2023-03-02 13:16 ` Robert Hoo
2023-03-03 1:08 ` Binbin Wu
2023-03-03 3:16 ` Robert Hoo
2023-03-03 3:35 ` Binbin Wu
2023-03-03 9:00 ` Robert Hoo
2023-03-03 10:18 ` Binbin Wu
2023-03-10 20:26 ` Sean Christopherson
2023-03-02 8:55 ` Chao Gao
2023-03-02 11:31 ` Binbin Wu
2023-03-10 20:23 ` Sean Christopherson
2023-02-27 8:45 ` [PATCH v5 5/5] KVM: x86: LAM: Expose LAM CPUID to user space VMM Robert Hoo
2023-03-03 6:46 ` Chao Gao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZABNkFpypTK5tvYW@gao-cwp \
--to=chao.gao@intel.com \
--cc=binbin.wu@linux.intel.com \
--cc=kvm@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=robert.hu@linux.intel.com \
--cc=seanjc@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox