From: Sean Christopherson <seanjc@google.com>
To: Zide Chen <zide.chen@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Jim Mattson <jmattson@google.com>,
Mingwei Zhang <mizhang@google.com>,
Das Sandipan <Sandipan.Das@amd.com>,
Shukla Manali <Manali.Shukla@amd.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH V2 0/4] KVM: x86/pmu: Add hardware Topdown metrics support
Date: Wed, 10 Jun 2026 15:03:21 -0700 [thread overview]
Message-ID: <ainfKdOgKp9i2qDP@google.com> (raw)
In-Reply-To: <20260423174639.56149-1-zide.chen@intel.com>
On Thu, Apr 23, 2026, Zide Chen wrote:
> The Top-Down Microarchitecture Analysis (TMA) method is a structured
> approach for identifying performance bottlenecks in out-of-order
> processors.
>
> Currently, guests support the TMA method by collecting Topdown events
> using GP counters, which may trigger multiplexing. To free up scarce
> GP counters, eliminate multiplexing-induced skew, and obtain coherent
> Topdown metric ratios, it is desirable to expose fixed counter 3 and
> the IA32_PERF_METRICS MSR to guests.
>
> Several attempts have been made to virtualize this under the legacy
> vPMU model [1][2][3], but they were unsuccessful. With the new mediated
> vPMU, enabling TMA support in guests becomes much simpler. It avoids
> invasive changes to the perf core, eliminates CPU pinning and
> fixed-counter affinity issues, and reduces the latge overhead of
> trapping and emulating MSR accesses.
Please submit a new version of this to address Dapeng's feedback, rebase on the
latest kvm-x86/next, and perhaps most importantly, to let Sashiko take a crack
at it.
Thanks!
prev parent reply other threads:[~2026-06-10 22:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-23 17:46 [PATCH V2 0/4] KVM: x86/pmu: Add hardware Topdown metrics support Zide Chen
2026-04-23 17:46 ` [PATCH V2 1/4] KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events Zide Chen
2026-04-30 1:55 ` Mi, Dapeng
2026-04-23 17:46 ` [PATCH V2 2/4] KVM: x86/pmu: Support Intel fixed counter 3 on mediated vPMU Zide Chen
2026-04-30 2:19 ` Mi, Dapeng
2026-04-30 17:54 ` Chen, Zide
2026-05-06 1:36 ` Mi, Dapeng
2026-04-23 17:46 ` [PATCH V2 3/4] KVM: x86/pmu: Support PERF_METRICS MSR in " Zide Chen
2026-04-30 2:22 ` Mi, Dapeng
2026-04-23 17:46 ` [PATCH V2 4/4] KVM: selftests: Add perf_metrics and fixed counter 3 tests Zide Chen
2026-04-30 2:26 ` Mi, Dapeng
2026-04-30 18:13 ` Chen, Zide
2026-06-10 22:03 ` Sean Christopherson [this message]
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