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From: Sean Christopherson <seanjc@google.com>
To: Tina Zhang <zhang_wei@open-hieco.net>
Cc: Jim Mattson <jmattson@google.com>,
	mlevitsk@redhat.com,  Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org, Shuah Khan <shuah@kernel.org>,
	 zhouyanjing@hygon.cn, linux-kselftest@vger.kernel.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] KVM: nSVM: Expose DecodeAssists to L1
Date: Mon, 6 Jul 2026 20:21:27 -0700	[thread overview]
Message-ID: <akxwt1mX6blSnkxI@google.com> (raw)
In-Reply-To: <d5645a47-c346-4e63-a5c6-c88bb39a3ee1@open-hieco.net>

On Tue, Jul 07, 2026, Tina Zhang wrote:
> 
> 
> On 7/7/2026 9:32 AM, Jim Mattson wrote:
> > On Mon, Jul 6, 2026 at 5:02 PM Tina Zhang <zhang_wei@open-hieco.net> wrote:
> > 
> > > I will take another look for the next version and try to handle the
> > > remaining pieces properly, while also making sure we don't expose stale
> > > or incorrectly synthesized decode-assist state for emulated exits.
> > 
> > Naples erratum 1096 seems to imply that the instruction bytes stored
> > in the VMCB are not necessarily the same instruction bytes that were
> > fetched and decoded to lead to the #PF/#NPF. Hence, in the case of
> > emulation, it might be sufficient to read the instruction bytes quite
> > late in nested_svm_vmexit(). That would certainly simplify the
> > plumbing.

The plumbing doesn't seem all that complex though.

> Thanks for the suggestion, and for pointing me at Naples erratum 1096. I
> wasn't aware of that erratum.
> 
> My understanding is that late fetching/decoding from guest RIP is not
> strictly equivalent to preserving the exact bytes observed by the original
> decoder, as the code bytes or translations could theoretically change in
> between. But the suggested workaround for erratum 1096 also tells the
> hypervisor to decode the instruction at the instruction pointer when
> GuestInstrBytes cannot be used, so it seems that this is an acceptable
> model/fallback.
> 
> For KVM-synthesized/emulated #PF/#NPF nested VM-Exits there is no fresh
> hardware GuestInstrBytes state to propagate to VMCB12. So I agree that it
> should be simpler to avoid plumbing instruction bytes from the emulator, and
> instead fetch the bytes late when constructing the nested VM-Exit for L1.
> 
> I'll try this direction first.

I'd rather not, at least not as the primary way.  It's going to raise a different
set of issues, e.g. how to behave if reading guest memory fails.  That's probably
unavoidable, e.g. if reading the INVPCID descriptor fails, then KVM doesn't even
have a pre-decoded instruction to work with, but it should ideally be a last
resort.

E.g. where the NULL case triggers an on-demand read of guest memory.

diff --git arch/x86/kvm/svm/nested.c arch/x86/kvm/svm/nested.c
index ba985a02208a..812af3a8d8b9 100644
--- arch/x86/kvm/svm/nested.c
+++ arch/x86/kvm/svm/nested.c
@@ -42,6 +42,7 @@ static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu,
        struct vcpu_svm *svm = to_svm(vcpu);
        struct vmcb *vmcb = svm->vmcb;
        u64 fault_stage;
+       u8 *insn_bytes;
 
        /*
         * For hardware NPF exits, the GUEST_FAULT_STAGE bits are only
@@ -68,7 +69,14 @@ static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu,
                                    (fault->error_code & ~PFERR_GUEST_FAULT_STAGE_MASK);
        vmcb->control.exit_info_2 = fault->address;
 
-       nested_svm_vmexit(svm);
+       if (from_hardware)
+               insn_bytes = svm->nested.vmcb02.ptr->control.insn_bytes;
+       else if (vcpu->arch.emulate_ctxt->eip == kvm_rip_read(vcpu))
+               insn_bytes = vcpu->arch.emulate_ctxt->fetch.data
+       else
+               insn_bytes = NULL;
+
+       nested_svm_vmexit(svm, insn_bytes);
 }
 
 static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index)

  reply	other threads:[~2026-07-07  3:21 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-29 12:52 [PATCH 0/2] KVM: nSVM: Expose DecodeAssists to L1 Tina Zhang
2026-06-29 12:52 ` [PATCH 1/2] KVM: nSVM: Virtualize DecodeAssists for nested guests Tina Zhang
2026-06-29 13:12   ` sashiko-bot
2026-06-30 15:11   ` Jim Mattson
2026-06-29 12:52 ` [PATCH 2/2] KVM: selftests: Add nested SVM DecodeAssists test Tina Zhang
2026-06-30 15:52 ` [PATCH 0/2] KVM: nSVM: Expose DecodeAssists to L1 Jim Mattson
2026-07-06 22:10   ` mlevitsk
2026-07-07  0:01     ` Tina Zhang
2026-07-07  1:32       ` Jim Mattson
2026-07-07  2:44         ` Tina Zhang
2026-07-07  3:21           ` Sean Christopherson [this message]
2026-07-07  3:25             ` Jim Mattson
2026-07-07  3:32               ` Jim Mattson
2026-07-07 14:42                 ` Sean Christopherson
2026-07-07 15:19                   ` Jim Mattson
2026-07-07 15:47                     ` Sean Christopherson
2026-07-07 18:56                       ` Jim Mattson
2026-07-07 14:41               ` Sean Christopherson
2026-07-07 15:24                 ` Jim Mattson
2026-07-07 15:37                   ` Sean Christopherson
2026-07-07 18:23                     ` Jim Mattson
2026-07-07 19:16                       ` Sean Christopherson
2026-07-07 22:34 ` Yosry Ahmed
2026-07-08  0:53   ` Tina Zhang
2026-07-08 14:04     ` Sean Christopherson
2026-07-08 17:47     ` Yosry Ahmed

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