From: Sean Christopherson <seanjc@google.com>
To: Jim Mattson <jmattson@google.com>
Cc: Manali Shukla <manali.shukla@amd.com>,
pbonzini@redhat.com, mingo@redhat.com, bp@alien8.de,
kvm@vger.kernel.org, x86@kernel.org, santosh.shukla@amd.com,
nikunj.dadhania@amd.com, Naveen.Rao@amd.com,
dapeng1.mi@linux.intel.com, ravi.bangoria@amd.com,
peterz@infradead.org, Sandipan.Das@amd.com,
Yosry Ahmed <yosry@kernel.org>
Subject: Re: [PATCH v3 6/9] KVM: SVM: Add support for IBS Virtualization
Date: Fri, 16 Oct 2026 09:01:25 -0700 [thread overview]
Message-ID: <atJKVRcCsAYewGl7@google.com> (raw)
In-Reply-To: <CALMp9eRkd-kgBpWTS4nYHaCuDH-PPgB-zvtomBXv-GS7G7M1tA@mail.gmail.com>
On Thu, Oct 08, 2026, Jim Mattson wrote:
> On Thu, Oct 8, 2026 at 12:19 PM Jim Mattson <jmattson@google.com> wrote:
> >
> > On Tue, Mar 10, 2026 at 06:00:18AM +0000, Manali Shukla wrote:
> > > + /*
> > > + * When IBS virtualization is enabled, guest reads from
> > > + * MSR_AMD64_IBSFETCHPHYSAD and MSR_AMD64_IBSDCPHYSAD must return 0.
This is incorrect. Hardware returns 0 because it (presumably) doesn't want to
translate the address on the fly. KVM isn't bound by such a restriction.
> > > + * This is done for security reasons, as guests should not be allowed to
> > > + * access or infer any information about the system's physical
> > > + * addresses.
> > > + */
> > > + case MSR_AMD64_IBSDCPHYSAD:
> > > + case MSR_AMD64_IBSFETCHPHYSAD:
> > > + msr_info->data = 0;
> > > + break;
> > > +
> >
> > These new cases should be conditional. Before this patch, KVM synthesized
> > a #GP for a guest without X86_FEATURE_IBS. Now it returns 0.
> >
> > But, is this even necessary? APM vol. 2, section 15.38, says that when IBS
> > virtualization is enabled in the VMCB, the processor returns 0 on guest
> > reads from IbsFetchPhysAd and IbsDcPhysAd and ignores guest writes to
> > them. Can't we just disable interception of these MSRs when VIBS is enabled
> > for the vCPU, and let the hardware handle them?
>
> Doh! As I realized later in the series, KVM_FEP requires that KVM must
> be able to emulate reads and writes of every virtualized MSR...even if
> virtualization just means "ignore."
Not just FEP. As proposed, the MSR is intercepted and so what hardware does is
irrelevant.
I'm confused by (at least) one thing: why can software write these MSRs? IIUC,
they are outputs from the CPU.
If these were read-only, couldn't KVM use gva_to_gpa() with MSR_AMD64_IBSDCLINAD
and MSR_AMD64_IBSFETCHLINAD to get the GPA for the guest? The MSRs being writable
is bizarre.
next prev parent reply other threads:[~2026-10-16 16:01 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 6:00 [PATCH v3 0/9] Implement support for IBS virtualization Manali Shukla
2026-03-10 6:00 ` [PATCH v3 1/9] perf/amd/ibs: Fix race condition in IBS Manali Shukla
2026-10-08 17:19 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 2/9] x86/cpufeatures: Add CPUID feature bit for VIBS in SVM/SEV guests Manali Shukla
2026-10-08 17:28 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 3/9] KVM: x86/cpuid: Add a KVM-only leaf for IBS capabilities Manali Shukla
2026-10-08 17:44 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 4/9] KVM: x86: Extend CPUID range to include new leaf Manali Shukla
2026-10-08 17:59 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 5/9] KVM: SVM: Extend VMCB area for virtualized IBS registers Manali Shukla
2026-10-08 18:01 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 6/9] KVM: SVM: Add support for IBS Virtualization Manali Shukla
2026-10-08 19:19 ` Jim Mattson
2026-10-08 21:28 ` Jim Mattson
2026-10-16 16:01 ` Sean Christopherson [this message]
2026-03-10 6:00 ` [PATCH v3 7/9] perf/x86/amd: Enable VPMU passthrough capability for IBS PMU Manali Shukla
2026-10-08 19:32 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 8/9] perf/x86/amd: Remove exclude_guest check from perf_ibs_init() Manali Shukla
2026-10-08 19:38 ` Jim Mattson
2026-03-10 6:00 ` [PATCH v3 9/9] KVM: SVM: Add newly added IBS capabilities and MSRs Manali Shukla
2026-10-08 21:03 ` Jim Mattson
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