From: Paolo Bonzini <pbonzini@redhat.com>
To: Luwei Kang <luwei.kang@intel.com>, kvm@vger.kernel.org
Cc: rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com,
hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org,
Chao Peng <chao.p.peng@linux.intel.com>
Subject: Re: [patch v2 8/8] KVM: x86: Disable intercept for Intel processor trace MSRs
Date: Mon, 13 Nov 2017 17:24:01 +0100 [thread overview]
Message-ID: <b6ad144f-d99e-b4da-2767-62bb01384151@redhat.com> (raw)
In-Reply-To: <1509401117-15521-9-git-send-email-luwei.kang@intel.com>
On 30/10/2017 23:05, Luwei Kang wrote:
> From: Chao Peng <chao.p.peng@linux.intel.com>
>
> Pass through Intel processor trace to guest directly.
>
> Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> ---
> arch/x86/kvm/vmx.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 8f61a8d..01447e2 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -7029,6 +7029,19 @@ static __init int hardware_setup(void)
> !cpu_has_vmx_intel_pt() || !cpu_has_vmx_pt_use_gpa())
> pt_mode = PT_MODE_SYSTEM;
>
> + if (pt_mode == PT_MODE_HOST_GUEST) {
> + u32 i, eax, ebx, ecx, edx;
> +
> + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> + vmx_disable_intercept_for_msr(MSR_IA32_RTIT_STATUS, false);
> + vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_BASE, false);
> + vmx_disable_intercept_for_msr(MSR_IA32_RTIT_OUTPUT_MASK, false);
> + vmx_disable_intercept_for_msr(MSR_IA32_RTIT_CR3_MATCH, false);
> + for (i = 0; i < (eax & 0x7); i++)
> + vmx_disable_intercept_for_msr(MSR_IA32_RTIT_ADDR0_A + i,
> + false);
> + }
> +
As I mentioned earlier, this probably makes vmentry/vmexit too expensive
when guests are not using processor tracing. I would do it only if
guest TRACEEN=1 (since anyway the values have to be correct if guest
TRACEEN=1, and a change in TRACEEN always causes a vmexit).
Paolo
> return alloc_kvm_area();
>
> out:
>
next prev parent reply other threads:[~2017-11-13 16:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-30 22:05 [patch v2 0/8] Intel Processor Trace virtulization enabling Luwei Kang
2017-10-30 22:05 ` [patch v2 1/8] perf/x86/intel/pt: Move Intel-PT MSR bit definitions to a public header Luwei Kang
2017-10-30 22:05 ` [patch v2 2/8] perf/x86/intel/pt: change pt_cap_get() to a public function Luwei Kang
2017-10-30 22:05 ` [patch v2 3/8] KVM: x86: add Intel processor trace virtualization mode Luwei Kang
2017-11-13 16:29 ` Paolo Bonzini
2017-11-14 7:11 ` Kang, Luwei
2017-11-13 16:32 ` Paolo Bonzini
2017-11-14 7:31 ` Kang, Luwei
2017-11-14 10:47 ` Paolo Bonzini
2017-10-30 22:05 ` [patch v2 4/8] KVM: x86: add Intel processor trace cpuid emulataion Luwei Kang
2017-11-13 15:36 ` Paolo Bonzini
2017-11-14 2:56 ` Kang, Luwei
2017-10-30 22:05 ` [patch v2 5/8] KVM: x86: add Intel processor trace context for each vcpu Luwei Kang
2017-10-30 22:05 ` [patch v2 6/8] KVM: x86: Implement Intel processor trace context switch Luwei Kang
2017-11-13 16:01 ` Paolo Bonzini
2017-10-30 22:05 ` [patch v2 7/8] KVM: x86: add Intel PT msr RTIT_CTL read/write Luwei Kang
2017-11-13 16:22 ` Paolo Bonzini
2017-11-14 6:59 ` Kang, Luwei
2017-11-14 10:34 ` Paolo Bonzini
2017-10-30 22:05 ` [patch v2 8/8] KVM: x86: Disable intercept for Intel processor trace MSRs Luwei Kang
2017-11-13 16:24 ` Paolo Bonzini [this message]
2017-11-14 7:01 ` Kang, Luwei
2017-11-02 14:57 ` [patch v2 0/8] Intel Processor Trace virtulization enabling Paolo Bonzini
2017-11-03 6:09 ` Kang, Luwei
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