From: sashiko-bot@kernel.org
To: "Zide Chen" <zide.chen@intel.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v4 21/21] KVM: selftests: Support fixed counters bitmap in pmu_counters_test
Date: Thu, 12 Nov 2026 21:00:30 +0000 [thread overview]
Message-ID: <sashiko-outbox-211841@kernel.org> (raw)
In-Reply-To: <20261112203227.289379-22-zide.chen@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] KVM: selftests: missing EDX/ECX combinations in
test_fixed_counters()
--
commit 3d8b2ca900bb2a01f5f9cee15fc9a12bc40184ad
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>
KVM: selftests: Support fixed counters bitmap in pmu_counters_test
This commit updates this_pmu_has() to check the guest PMU version before
consulting CPUID.0AH:ECX and updates test_fixed_counters() to test
supported fixed counter bitmasks alongside CPUID.0AH:EDX[4:0].
> diff --git a/tools/testing/selftests/kvm/x86/pmu_counters_test.c b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> index c3e784e16348c..61e6fe5b6ef48 100644
> --- a/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> +++ b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
[ ... ]
> @@ -631,25 +632,43 @@ static void __test_fixed_counters(struct kvm_vcpu *vcpu, u8 nr_fixed_counters,
> static void test_fixed_counters(u8 pmu_version, u64 perf_capabilities)
> {
> u8 nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS);
> + unsigned long fixed_subset;
> struct kvm_vcpu **vcpus;
> struct kvm_vm *vm;
> + u32 fixed_bitmap;
> int i = 0;
> - u32 k;
> u8 j;
>
> pr_info("Testing %u fixed counters, PMU version %u, perf_caps = %lx\n",
> nr_fixed_counters, pmu_version, perf_capabilities);
>
> + fixed_bitmap = BIT(nr_fixed_counters) - 1;
> + if (pmu_version >= 5)
> + fixed_bitmap |= kvm_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK);
>
> - vm = pmu_vm_create_with_vcpus((nr_fixed_counters + 1) * BIT(nr_fixed_counters),
> + /* One vCPU per subset of fixed_bitmap, plus one per legacy EDX test. */
> + vm = pmu_vm_create_with_vcpus(BIT(__builtin_popcount(fixed_bitmap)) + nr_fixed_counters,
> guest_test_fixed_counters,
> pmu_version, perf_capabilities, &vcpus);
>
> - for (j = 0; j <= nr_fixed_counters; j++) {
> - for (k = 0; k <= (BIT(nr_fixed_counters) - 1); k++)
> - __test_fixed_counters(vcpus[i++], j, k);
> + for (fixed_subset = 0; fixed_subset <= fixed_bitmap; fixed_subset++) {
> + u32 nr_contiguous;
> +
> + /*
> + * The loop walks all values from 0 to fixed_bitmap, so skip any
> + * value that is not a subset of fixed_bitmap.
> + */
> + if (fixed_subset & ~fixed_bitmap)
> + continue;
> +
> + nr_contiguous = find_first_zero_bit(&fixed_subset,
> + MAX_NR_FIXED_COUNTERS);
> + __test_fixed_counters(vcpus[i++], nr_contiguous, fixed_subset);
> }
>
> + for (j = 1; j <= nr_fixed_counters; j++)
> + __test_fixed_counters(vcpus[i++], j, 0);
> +
> pmu_vm_free(vm, vcpus);
> }
[Severity: Medium]
Does deriving nr_contiguous from fixed_subset drop test coverage for fixed
counters enabled solely via CPUID.0AH:ECX when EDX[4:0] is 0?
Whenever bit 0 of fixed_subset is set, find_first_zero_bit() returns at
least 1, and the second loop only tests supported_bitmask == 0 with j >= 1.
As a result, fixed counter 0 (and any contiguous prefix of fixed_subset
starting at bit 0) is never tested with nr_fixed_counters == 0 and ECX[i]
set, nor does a guest with pmu_version < 5 get tested with EDX[4:0] == 0
and a non-zero contiguous ECX mask to verify that KVM ignores ECX.
In addition, gating X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK on
pmu_version >= 5 skips non-contiguous host ECX bits when testing guest
pmu_version < 5, so the test never verifies that KVM ignores those bits on
older PMU versions. Keeping the outer loop over j in 0..nr_fixed_counters
and the inner loop over subsets of an unconditionally constructed
fixed_bitmap would cover all (EDX[4:0], ECX) combinations across all PMU
versions.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261112203227.289379-1-zide.chen@intel.com?part=21
prev parent reply other threads:[~2026-11-12 21:00 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 20:32 [PATCH v4 00/21] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Zide Chen
2026-11-12 20:32 ` [PATCH v4 01/21] KVM: SVM: Drop counter MSR checks in amd_is_valid_msr() Zide Chen
2026-11-12 20:32 ` [PATCH v4 02/21] KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions Zide Chen
2026-11-12 20:32 ` [PATCH v4 03/21] KVM: x86/pmu: Rename all_valid_pmc_idx to pmc_exists Zide Chen
2026-11-12 20:32 ` [PATCH v4 04/21] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu Zide Chen
2026-11-12 20:32 ` [PATCH v4 05/21] KVM: x86/pmu: Use pmc_exists in PMC lookup helpers Zide Chen
2026-11-12 20:32 ` [PATCH v4 06/21] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu Zide Chen
2026-11-12 20:32 ` [PATCH v4 07/21] KVM: x86/pmu: Expose kvm_host_pmu to vendor modules Zide Chen
2026-11-12 20:32 ` [PATCH v4 08/21] perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap Zide Chen
2026-11-12 20:32 ` [PATCH v4 09/21] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities Zide Chen
2026-11-12 20:32 ` [PATCH v4 10/21] perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability Zide Chen
2026-11-12 20:32 ` [PATCH v4 11/21] KVM: x86/pmu: Document GLOBAL_STATUS_RESET passthrough erratum Zide Chen
2026-11-12 20:32 ` [PATCH v4 12/21] KVM: x86/pmu: Mark CondChgd reserved in global_status_rsvd Zide Chen
2026-11-12 20:32 ` [PATCH v4 13/21] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_STATUS_SET MSR Zide Chen
2026-11-12 20:32 ` [PATCH v4 14/21] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_INUSE MSR Zide Chen
2026-11-12 20:32 ` [PATCH v4 15/21] KVM: x86/pmu: Clamp pmu->version to kvm_pmu_cap.version Zide Chen
2026-11-12 20:32 ` [PATCH v4 16/21] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap Zide Chen
2026-11-12 20:32 ` [PATCH v4 17/21] KVM: x86/pmu: Factor out fixed counter control bit calculation Zide Chen
2026-11-12 20:32 ` [PATCH v4 18/21] KVM: x86/pmu: Mask only OS/USR bits when filtering fixed counters Zide Chen
2026-11-12 20:32 ` [PATCH v4 19/21] KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is set Zide Chen
2026-11-12 20:32 ` [PATCH v4 20/21] KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts Zide Chen
2026-11-12 20:32 ` [PATCH v4 21/21] KVM: selftests: Support fixed counters bitmap in pmu_counters_test Zide Chen
2026-11-12 21:00 ` sashiko-bot [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=sashiko-outbox-211841@kernel.org \
--to=sashiko-bot@kernel.org \
--cc=kvm@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=zide.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox