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From: Marc Zyngier <marc.zyngier@arm.com>
To: Andrew Murray <andrew.murray@arm.com>
Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 5/5] KVM: arm/arm64: support chained PMU counters
Date: Mon, 18 Feb 2019 14:02:11 +0000	[thread overview]
Message-ID: <20190218140211.066b2d70@why.wild-wind.fr.eu.org> (raw)
In-Reply-To: <20190218120305.GH54124@e119886-lin.cambridge.arm.com>

On Mon, 18 Feb 2019 12:03:05 +0000
Andrew Murray <andrew.murray@arm.com> wrote:

> On Thu, Feb 14, 2019 at 11:42:15AM +0000, Suzuki K Poulose wrote:
> > 
> > 
> > On 05/02/2019 14:33, Julien Thierry wrote:  
> > > Hi Andrew,
> > > 
> > > On 04/02/2019 16:53, Andrew Murray wrote:  
> > > > Emulate chained PMU counters by creating a single 64 bit event counter
> > > > for a pair of chained KVM counters.
> > > > 
> > > > Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> > > > ---
> > > >   include/kvm/arm_pmu.h |   1 +
> > > >   virt/kvm/arm/pmu.c    | 321 +++++++++++++++++++++++++++++++++++++++++---------
> > > >   2 files changed, 269 insertions(+), 53 deletions(-)
> > > > 
> > > > diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
> > > > index b73f31b..8e691ee 100644
> > > > --- a/include/kvm/arm_pmu.h
> > > > +++ b/include/kvm/arm_pmu.h
> > > > @@ -29,6 +29,7 @@ struct kvm_pmc {
> > > >   	u8 idx;	/* index into the pmu->pmc array */
> > > >   	struct perf_event *perf_event;
> > > >   	u64 bitmask;
> > > > +	u64 overflow_count;
> > > >   };
> > > >   struct kvm_pmu {
> > > > diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c
> > > > index a64aeb2..9318130 100644
> > > > --- a/virt/kvm/arm/pmu.c
> > > > +++ b/virt/kvm/arm/pmu.c
> > > > @@ -24,9 +24,25 @@
> > > >   #include <kvm/arm_pmu.h>
> > > >   #include <kvm/arm_vgic.h>
> > > > +#define ARMV8_PMUV3_PERFCTR_CHAIN 0x1E  
> > > 
> > > I find it a bit awkward to have this redefined here.
> > > 
> > > Maybe we could define a helper in kvm_host.h:
> > > bool kvm_pmu_typer_is_chain(u64 typer);
> > > 
> > > That would always return false for arm32?  
> > 
> > We don't support ARMv7 host, so that doesn't matter. But
> > it is a good idea to wrap it in a function here.  
> 
> I'm not sure kvm_host.h is the right place for this as this really relates
> to the ARM PMU drivers. Seeing that armv8pmu_filter_match in
> arch/arm64/kernel/perf_event.c would also benefit from this new function I'll
> add it to arch/arm64/include/asm/perf_event.h and stub it out in arm_pmu.c
> for the ARM32 case.

Doing that is going to create a dependency with the perf subsystem,
and will need an Ack from the maintainer (Will).

Thanks,

	M.
-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2019-02-18 14:02 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-04 16:53 [PATCH v2 0/5] KVM: arm/arm64: add support for chained counters Andrew Murray
2019-02-04 16:53 ` [PATCH v2 1/5] KVM: arm/arm64: rename kvm_pmu_{enable/disable}_counter functions Andrew Murray
2019-02-05 12:21   ` Julien Thierry
2019-02-11 17:23   ` Suzuki K Poulose
2019-02-04 16:53 ` [PATCH v2 2/5] KVM: arm/arm64: extract duplicated code to own function Andrew Murray
2019-02-04 16:53 ` [PATCH v2 3/5] KVM: arm/arm64: re-create event when setting counter value Andrew Murray
2019-02-05 12:21   ` Julien Thierry
2019-02-05 12:27     ` Andrew Murray
2019-02-13 14:28   ` Suzuki K Poulose
2019-02-18  9:39     ` Andrew Murray
2019-02-04 16:53 ` [PATCH v2 4/5] KVM: arm/arm64: lazily create perf events on enable Andrew Murray
2019-02-14 11:36   ` Suzuki K Poulose
2019-02-18  9:57     ` Andrew Murray
2019-02-04 16:53 ` [PATCH v2 5/5] KVM: arm/arm64: support chained PMU counters Andrew Murray
2019-02-05 14:33   ` Julien Thierry
2019-02-14 11:42     ` Suzuki K Poulose
2019-02-18 12:03       ` Andrew Murray
2019-02-18 14:02         ` Marc Zyngier [this message]
2019-02-18 10:11     ` Andrew Murray
2019-02-18  8:52 ` [PATCH v2 0/5] KVM: arm/arm64: add support for chained counters Marc Zyngier
2019-02-18 12:10   ` Andrew Murray

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