From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Andre Przywara <andre.przywara@arm.com>,
Eric Auger <eric.auger@redhat.com>
Subject: [PATCH v2 06/17] KVM: arm64: nv: Add ICH_*_EL2 registers to vpcu_sysreg
Date: Sun, 12 Jan 2025 17:08:34 +0000 [thread overview]
Message-ID: <20250112170845.1181891-7-maz@kernel.org> (raw)
In-Reply-To: <20250112170845.1181891-1-maz@kernel.org>
FEAT_NV2 comes with a bunch of register-to-memory redirection
involving the ICH_*_EL2 registers (LRs, APRs, VMCR, HCR).
Adds them to the vcpu_sysreg enumeration.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/kvm_host.h | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 8cc25845b4be3..218047cd0296d 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -554,7 +554,33 @@ enum vcpu_sysreg {
VNCR(CNTP_CVAL_EL0),
VNCR(CNTP_CTL_EL0),
+ VNCR(ICH_LR0_EL2),
+ VNCR(ICH_LR1_EL2),
+ VNCR(ICH_LR2_EL2),
+ VNCR(ICH_LR3_EL2),
+ VNCR(ICH_LR4_EL2),
+ VNCR(ICH_LR5_EL2),
+ VNCR(ICH_LR6_EL2),
+ VNCR(ICH_LR7_EL2),
+ VNCR(ICH_LR8_EL2),
+ VNCR(ICH_LR9_EL2),
+ VNCR(ICH_LR10_EL2),
+ VNCR(ICH_LR11_EL2),
+ VNCR(ICH_LR12_EL2),
+ VNCR(ICH_LR13_EL2),
+ VNCR(ICH_LR14_EL2),
+ VNCR(ICH_LR15_EL2),
+
+ VNCR(ICH_AP0R0_EL2),
+ VNCR(ICH_AP0R1_EL2),
+ VNCR(ICH_AP0R2_EL2),
+ VNCR(ICH_AP0R3_EL2),
+ VNCR(ICH_AP1R0_EL2),
+ VNCR(ICH_AP1R1_EL2),
+ VNCR(ICH_AP1R2_EL2),
+ VNCR(ICH_AP1R3_EL2),
VNCR(ICH_HCR_EL2),
+ VNCR(ICH_VMCR_EL2),
NR_SYS_REGS /* Nothing after this line! */
};
--
2.39.2
next prev parent reply other threads:[~2025-01-12 17:08 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-12 17:08 [PATCH v2 00/17] KVM: arm64: Add NV GICv3 support Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 01/17] arm64: sysreg: Add layout for ICH_HCR_EL2 Marc Zyngier
2025-01-15 18:39 ` Andre Przywara
2025-01-12 17:08 ` [PATCH v2 02/17] arm64: sysreg: Add layout for ICH_VTR_EL2 Marc Zyngier
2025-01-15 18:40 ` Andre Przywara
2025-01-12 17:08 ` [PATCH v2 03/17] arm64: sysreg: Add layout for ICH_MISR_EL2 Marc Zyngier
2025-01-15 18:41 ` Andre Przywara
2025-01-12 17:08 ` [PATCH v2 04/17] KVM: arm64: Move host SVE/SME state flags out of vCPU Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 05/17] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2025-01-12 17:08 ` Marc Zyngier [this message]
2025-01-12 17:08 ` [PATCH v2 07/17] KVM: arm64: nv: Plumb handling of GICv3 EL2 accesses Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 08/17] KVM: arm64: nv: Sanitise ICH_HCR_EL2 accesses Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 09/17] KVM: arm64: nv: Nested GICv3 emulation Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 10/17] KVM: arm64: nv: Handle L2->L1 transition on interrupt injection Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 11/17] KVM: arm64: nv: Add Maintenance Interrupt emulation Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 12/17] KVM: arm64: nv: Respect virtual HCR_EL2.TWx setting Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 13/17] KVM: arm64: nv: Request vPE doorbell upon nested ERET to L2 Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 14/17] KVM: arm64: nv: Propagate used_lrs between L1 and L0 contexts Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 15/17] KVM: arm64: nv: Fold GICv3 host trapping requirements into guest setup Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 16/17] KVM: arm64: nv: Allow userland to set VGIC maintenance IRQ Marc Zyngier
2025-01-12 17:08 ` [PATCH v2 17/17] KVM: arm64: nv: Fail KVM init if asking for NV without GICv3 Marc Zyngier
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