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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Fuad Tabba <tabba@google.com>
Subject: [PATCH 17/18] KVM: arm64: Validate FGT register descriptions against RES0 masks
Date: Mon, 10 Feb 2025 18:41:48 +0000	[thread overview]
Message-ID: <20250210184150.2145093-18-maz@kernel.org> (raw)
In-Reply-To: <20250210184150.2145093-1-maz@kernel.org>

In order to point out to the unsuspecting KVM hacker that they
are missing something somewhere, validate that the known FGT bits
do not intersect with the corresponding RES0 mask, as computed at
boot time.

THis check is also performed at boot time, ensuring that there is
no runtime overhead.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/include/asm/kvm_host.h |  1 +
 arch/arm64/kvm/config.c           | 29 +++++++++++++++++++++++++++++
 arch/arm64/kvm/sys_regs.c         |  2 ++
 3 files changed, 32 insertions(+)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index f9975b5f8907a..b537adc5c5557 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -1577,5 +1577,6 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);
 	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))
 
 void compute_fgu(struct kvm *kvm, enum fgt_group_id fgt);
+void check_feature_map(void);
 
 #endif /* __ARM64_KVM_HOST_H__ */
diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c
index 0a68555068f11..c9dff71006bf4 100644
--- a/arch/arm64/kvm/config.c
+++ b/arch/arm64/kvm/config.c
@@ -482,6 +482,35 @@ static struct reg_bits_to_feat_map hafgrtr_feat_map[] = {
 		   FEAT_AMUv1),
 };
 
+static void __init check_feat_map(struct reg_bits_to_feat_map *map,
+				  int map_size, u64 res0, const char *str)
+{
+	u64 mask = 0;
+
+	for (int i = 0; i < map_size; i++)
+		mask |= map[i].bits;
+
+	if (mask != ~res0)
+		kvm_err("Undefined %s behaviour, bits %016llx\n",
+			str, mask ^ ~res0);
+}
+
+void __init check_feature_map(void)
+{
+	check_feat_map(hfgrtr_feat_map, ARRAY_SIZE(hfgrtr_feat_map),
+		       hfgrtr_masks.res0, hfgrtr_masks.str);
+	check_feat_map(hfgwtr_feat_map, ARRAY_SIZE(hfgwtr_feat_map),
+		       hfgwtr_masks.res0, hfgwtr_masks.str);
+	check_feat_map(hfgitr_feat_map, ARRAY_SIZE(hfgitr_feat_map),
+		       hfgitr_masks.res0, hfgitr_masks.str);
+	check_feat_map(hdfgrtr_feat_map, ARRAY_SIZE(hdfgrtr_feat_map),
+		       hdfgrtr_masks.res0, hdfgrtr_masks.str);
+	check_feat_map(hdfgwtr_feat_map, ARRAY_SIZE(hdfgwtr_feat_map),
+		       hdfgwtr_masks.res0, hdfgwtr_masks.str);
+	check_feat_map(hafgrtr_feat_map, ARRAY_SIZE(hafgrtr_feat_map),
+		       hafgrtr_masks.res0, hafgrtr_masks.str);
+}
+
 static bool idreg_feat_match(struct kvm *kvm, struct reg_bits_to_feat_map *map)
 {
 	u64 regval = kvm->arch.id_regs[map->regidx];
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index d3990ceaa59c2..89fc07c57e438 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -5058,6 +5058,8 @@ int __init kvm_sys_reg_table_init(void)
 
 	ret = populate_nv_trap_config();
 
+	check_feature_map();
+
 	for (i = 0; !ret && i < ARRAY_SIZE(sys_reg_descs); i++)
 		ret = populate_sysreg_config(sys_reg_descs + i, i);
 
-- 
2.39.2


  parent reply	other threads:[~2025-02-10 18:42 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-10 18:41 [PATCH 00/18] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier
2025-02-10 18:41 ` [PATCH 01/18] arm64: Add ID_AA64ISAR1_EL1.LS64 encoding for FEAT_LS64WB Marc Zyngier
2025-02-10 18:41 ` [PATCH 02/18] arm64: Add syndrome information for trapped LD64B/ST64B{,V,V0} Marc Zyngier
2025-02-11 12:23   ` Mark Rutland
2025-02-10 18:41 ` [PATCH 03/18] KVM: arm64: Handle trapping of FEAT_LS64* instructions Marc Zyngier
2025-02-11 12:28   ` Mark Rutland
2025-03-04 14:36   ` Fuad Tabba
2025-03-04 15:25     ` Marc Zyngier
2025-03-04 15:47     ` Marc Zyngier
2025-02-10 18:41 ` [PATCH 04/18] KVM: arm64: Restrict ACCDATA_EL1 undef to FEAT_ST64_ACCDATA being disabled Marc Zyngier
2025-02-10 18:41 ` [PATCH 05/18] KVM: arm64: Don't treat HCRX_EL2 as a FGT register Marc Zyngier
2025-02-10 18:41 ` [PATCH 06/18] KVM: arm64: Plug FEAT_GCS handling Marc Zyngier
2025-02-11 12:36   ` Mark Rutland
2025-02-11 13:35     ` Marc Zyngier
2025-02-11 13:47       ` Mark Rutland
2025-02-10 18:41 ` [PATCH 07/18] KVM: arm64: Compute FGT masks from KVM's own FGT tables Marc Zyngier
2025-03-04 16:55   ` Fuad Tabba
2025-03-10 11:42     ` Marc Zyngier
2025-03-11 19:10     ` Marc Zyngier
2025-02-10 18:41 ` [PATCH 08/18] KVM: arm64: Add description of FGT bits leading to EC!=0x18 Marc Zyngier
2025-02-10 18:41 ` [PATCH 09/18] KVM: arm64: Use computed masks as sanitisers for FGT registers Marc Zyngier
2025-02-10 18:41 ` [PATCH 10/18] KVM: arm64: Unconditionally configure fine-grain traps Marc Zyngier
2025-02-10 18:41 ` [PATCH 11/18] KVM: arm64: Propagate FGT masks to the nVHE hypervisor Marc Zyngier
2025-02-10 18:41 ` [PATCH 12/18] KVM: arm64: Use computed FGT masks to setup FGT registers Marc Zyngier
2025-02-10 18:41 ` [PATCH 13/18] KVM: arm64: Remove most hand-crafted masks for " Marc Zyngier
2025-02-10 18:41 ` [PATCH 14/18] KVM: arm64: Use KVM-specific HCRX_EL2 RES0 mask Marc Zyngier
2025-02-10 18:41 ` [PATCH 15/18] KVM: arm64: Handle PSB CSYNC traps Marc Zyngier
2025-02-10 18:41 ` [PATCH 16/18] KVM: arm64: Switch to table-driven FGU configuration Marc Zyngier
2025-02-10 18:41 ` Marc Zyngier [this message]
2025-02-10 18:41 ` [PATCH 18/18] KVM: arm64: Use FGT feature maps to drive RES0 bits Marc Zyngier

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