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From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	kvmarm@lists.linux.dev, peter.maydell@linaro.org,
	shaju.abraham@nutanix.com, khushit.shah@nutanix.com,
	yangjinqian1@huawei.com, cohuck@redhat.com,
	richard.henderson@linaro.org, sebott@redhat.com,
	skolothumtho@nvidia.com, philmd@linaro.org
Cc: maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,
	armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,
	jdenemar@redhat.com
Subject: [PATCH v5 05/18] scripts: Introduce scripts/aarch64_sysreg_helpers module
Date: Tue, 19 May 2026 15:27:19 +0200	[thread overview]
Message-ID: <20260519132905.145643-6-eric.auger@redhat.com> (raw)
In-Reply-To: <20260519132905.145643-1-eric.auger@redhat.com>

We plan to reuse get_opcode() and extract_idregs_from_registers_json()
functions in another script. So let's move them into a module

No functional change intended.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 scripts/aarch64_sysreg_helpers.py            | 109 +++++++++++++++++++
 scripts/update-aarch64-cpu-sysregs-header.py |  85 +--------------
 2 files changed, 110 insertions(+), 84 deletions(-)
 create mode 100644 scripts/aarch64_sysreg_helpers.py

diff --git a/scripts/aarch64_sysreg_helpers.py b/scripts/aarch64_sysreg_helpers.py
new file mode 100644
index 0000000000..dd5ec4bafa
--- /dev/null
+++ b/scripts/aarch64_sysreg_helpers.py
@@ -0,0 +1,109 @@
+#!/usr/bin/env python3
+
+# Helpers used in aarch64 sysreg definition generation
+#
+# Copyright (C) 2026 Red Hat, Inc.
+#
+# Authors: Eric Auger <eric.auger@redhat.com>
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+
+import json
+import os
+
+# Some regs have op code values like 000x, 001x. Anyway we don't need
+# them. Besides some regs are undesired in the generated file such as
+# VMPIDR_EL2 and VPIDR_EL2 which are outside of the IDreg scope we
+# are interested in and are tricky to decode as their system accessor
+# refer to MPIDR_EL1/MIDR_EL1 respectively
+
+skiplist = ['ALLINT', 'PM', 'S1_', 'S3_', 'SVCR', \
+            'VMPIDR_EL2', 'VPIDR_EL2']
+
+# returns the int value of a given @opcode for a reg @encoding
+def get_opcode(encoding, opcode):
+    fvalue = encoding.get(opcode)
+    if fvalue:
+        value = fvalue.get('value')
+        if isinstance(value, str):
+            value = value.strip("'")
+            value = int(value, 2)
+            return value
+    return -1
+
+def extract_idregs_from_registers_json(filename):
+    """
+    Load a Registers.json file and extract all ID registers, decode their
+    opcode and dump the information in target/arm/cpu-sysregs.h.inc
+
+    Args:
+        filename (str): The path to the Registers.json
+    returns:
+        idregs: list of ID regs and their encoding
+    """
+    if not os.path.exists(filename):
+        print(f"Error: {filename} could not be found!")
+        return {}
+
+    try:
+        with open(filename, 'r') as f:
+            register_data = json.load(f)
+
+    except json.JSONDecodeError:
+        print(f"Could not decode json from '{filename}'!")
+        return {}
+    except Exception as e:
+        print(f"Unexpected error while reading {filename}: {e}")
+        return {}
+
+    registers = [r for r in register_data if isinstance(r, dict) and \
+                r.get('_type') == 'Register']
+
+    idregs = {}
+
+    # Some regs have op code values like 000x, 001x. Anyway we don't need
+    # them. Besides some regs are undesired in the generated file such as
+    # VMPIDR_EL2 and VPIDR_EL2 which are outside of the IDreg scope we
+    # are interested in and are tricky to decode as their system accessor
+    # refer to MPIDR_EL1/MIDR_EL1 respectively
+
+    skiplist = ['ALLINT', 'PM', 'S1_', 'S3_', 'SVCR', \
+                'VMPIDR_EL2', 'VPIDR_EL2']
+
+    for register in registers:
+        reg_name = register.get('name')
+
+        is_skipped = any(term in (reg_name or "").upper() for term in skiplist)
+
+        if reg_name and not is_skipped:
+            accessors = register.get('accessors', [])
+
+            for accessor in accessors:
+                type = accessor.get('_type')
+                if type in ['Accessors.SystemAccessor']:
+                    encoding_list = accessor.get('encoding')
+
+                    if isinstance(encoding_list, list) and encoding_list and \
+                       isinstance(encoding_list[0], dict):
+                        encoding_wrapper = encoding_list[0]
+                        encoding_source = encoding_wrapper.get('encodings', \
+                                                               encoding_wrapper)
+
+                        if isinstance(encoding_source, dict):
+                                op0 = get_opcode(encoding_source, 'op0')
+                                op1 = get_opcode(encoding_source, 'op1')
+                                op2 = get_opcode(encoding_source, 'op2')
+                                crn = get_opcode(encoding_source, 'CRn')
+                                crm = get_opcode(encoding_source, 'CRm')
+                                encoding_str=f"{op0} {op1} {crn} {crm} {op2}"
+
+                # ID regs are assumed within this scope
+                if op0 == 3 and (op1 == 0 or op1 == 1 or op1 == 3) and \
+                   crn == 0 and (crm >= 0 and crm <= 7) and (op2 >= 0 and op2 <= 7):
+                    idregs[reg_name] = encoding_str
+
+    return idregs
+
+
+
diff --git a/scripts/update-aarch64-cpu-sysregs-header.py b/scripts/update-aarch64-cpu-sysregs-header.py
index 8c337147dd..43107264e9 100755
--- a/scripts/update-aarch64-cpu-sysregs-header.py
+++ b/scripts/update-aarch64-cpu-sysregs-header.py
@@ -17,90 +17,7 @@
 import json
 import os
 import sys
-
-# Some regs have op code values like 000x, 001x. Anyway we don't need
-# them. Besides some regs are undesired in the generated file such as
-# VMPIDR_EL2 and VPIDR_EL2 which are outside of the IDreg scope we
-# are interested in and are tricky to decode as their system accessor
-# refer to MPIDR_EL1/MIDR_EL1 respectively
-
-skiplist = ['ALLINT', 'PM', 'S1_', 'S3_', 'SVCR', \
-            'VMPIDR_EL2', 'VPIDR_EL2']
-
-# returns the int value of a given @opcode for a reg @encoding
-def get_opcode(encoding, opcode):
-    fvalue = encoding.get(opcode)
-    if fvalue:
-        value = fvalue.get('value')
-        if isinstance(value, str):
-            value = value.strip("'")
-            value = int(value, 2)
-            return value
-    return -1
-
-def extract_idregs_from_registers_json(filename):
-    """
-    Load a Registers.json file and extract all ID registers, decode their
-    opcode and dump the information in target/arm/cpu-sysregs.h.inc
-
-    Args:
-        filename (str): The path to the Registers.json
-    returns:
-        idregs: list of ID regs and their encoding
-    """
-    if not os.path.exists(filename):
-        print(f"Error: {filename} could not be found!")
-        return {}
-
-    try:
-        with open(filename, 'r') as f:
-            register_data = json.load(f)
-
-    except json.JSONDecodeError:
-        print(f"Could not decode json from '{filename}'!")
-        return {}
-    except Exception as e:
-        print(f"Unexpected error while reading {filename}: {e}")
-        return {}
-
-    registers = [r for r in register_data if isinstance(r, dict) and \
-                r.get('_type') == 'Register']
-
-    idregs = {}
-
-    for register in registers:
-        reg_name = register.get('name')
-
-        is_skipped = any(term in (reg_name or "").upper() for term in skiplist)
-
-        if reg_name and not is_skipped:
-            accessors = register.get('accessors', [])
-
-            for accessor in accessors:
-                type = accessor.get('_type')
-                if type in ['Accessors.SystemAccessor']:
-                    encoding_list = accessor.get('encoding')
-
-                    if isinstance(encoding_list, list) and encoding_list and \
-                       isinstance(encoding_list[0], dict):
-                        encoding_wrapper = encoding_list[0]
-                        encoding_source = encoding_wrapper.get('encodings', \
-                                                               encoding_wrapper)
-
-                        if isinstance(encoding_source, dict):
-                                op0 = get_opcode(encoding_source, 'op0')
-                                op1 = get_opcode(encoding_source, 'op1')
-                                op2 = get_opcode(encoding_source, 'op2')
-                                crn = get_opcode(encoding_source, 'CRn')
-                                crm = get_opcode(encoding_source, 'CRm')
-                                encoding_str=f"{op0} {op1} {crn} {crm} {op2}"
-
-                # ID regs are assumed within this scope
-                if op0 == 3 and (op1 == 0 or op1 == 1 or op1 == 3) and \
-                   crn == 0 and (crm >= 0 and crm <= 7) and (op2 >= 0 and op2 <= 7):
-                    idregs[reg_name] = encoding_str
-
-    return idregs
+from aarch64_sysreg_helpers import extract_idregs_from_registers_json
 
 if __name__ == "__main__":
     # Single arg expected: the path to the Registers.json file
-- 
2.53.0


  parent reply	other threads:[~2026-05-19 13:29 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-19 13:27 [PATCH v5 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2026-05-19 13:27 ` [PATCH v5 01/18] scripts: introduce scripts/update-aarch64-cpu-sysregs-header.py Eric Auger
2026-05-19 13:27 ` [PATCH v5 02/18] target/arm/cpu-sysregs.h.inc: Sort by name alphabetical order Eric Auger
2026-06-01 14:07   ` Shameer Kolothum Thodi
2026-05-19 13:27 ` [PATCH v5 03/18] target/arm/cpu-sysregs.h.inc: Update with automatic generation Eric Auger
2026-06-01 14:09   ` Shameer Kolothum Thodi
2026-05-19 13:27 ` [PATCH v5 04/18] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2026-05-21 13:23   ` Sebastian Ott
2026-06-01 14:28   ` Shameer Kolothum Thodi
2026-06-12  7:38     ` Eric Auger
2026-06-15 13:20       ` Shameer Kolothum Thodi
2026-05-19 13:27 ` Eric Auger [this message]
2026-05-19 13:27 ` [PATCH v5 06/18] scripts: Introduce scripts/update-aarch64-cpu-sysreg-properties.py Eric Auger
2026-05-27 14:35   ` Khushit Shah
2026-05-27 15:11     ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 07/18] target/arm/cpu-idregs.h.inc: generate with script Eric Auger
2026-05-19 13:27 ` [PATCH v5 08/18] target/arm/cpu_idregs: generate tables for Arm64 ID registers and fields Eric Auger
2026-05-21 13:27   ` Sebastian Ott
2026-05-27 14:52   ` Khushit Shah
2026-05-27 15:14     ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 09/18] target/arm/kvm: Introduce kvm_get_writable_id_regs Eric Auger
2026-05-21 13:43   ` Sebastian Ott
2026-06-01 15:26   ` Shameer Kolothum Thodi
2026-05-19 13:27 ` [PATCH v5 10/18] target/arm/cpu64: Retrieve writable ID reg map in aarch64_host_initfn() Eric Auger
2026-05-21 13:47   ` Sebastian Ott
2026-05-27 14:54   ` Khushit Shah
2026-05-27 15:17     ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 11/18] arm/kvm: Initialize all writable ID registers from host Eric Auger
2026-05-21 14:22   ` Sebastian Ott
2026-05-27 15:02   ` Khushit Shah
2026-05-27 15:25     ` Eric Auger
2026-05-27 15:30     ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 12/18] arm/kvm: write back modified ID regs to KVM Eric Auger
2026-05-27 14:42   ` Khushit Shah
2026-05-27 15:28     ` Khushit Shah
2026-05-27 15:33       ` Khushit Shah
2026-05-28 17:35     ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 13/18] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties Eric Auger
2026-05-26 14:42   ` Sebastian Ott
2026-05-27 15:08   ` Khushit Shah
2026-05-27 15:32     ` Eric Auger
2026-05-27 15:44       ` Khushit Shah
2026-05-27 16:19         ` Eric Auger
2026-05-28  5:07           ` Khushit Shah
2026-05-28 15:22             ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 14/18] target/arm/kvm: Special case REVIDR_EL1 and AIDR_EL1 Eric Auger
2026-05-26 15:08   ` Sebastian Ott
2026-05-19 13:27 ` [PATCH v5 15/18] target/arm/kvm: Ignore some writable bits that shouldn't be Eric Auger
2026-05-27 14:46   ` Khushit Shah
2026-05-27 15:45     ` Eric Auger
2026-05-27 15:54       ` Khushit Shah
2026-05-27 16:01         ` Eric Auger
2026-05-27 16:16           ` Khushit Shah
2026-05-27 16:30             ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 16/18] target/arm/cpu: Expose writable ID reg field properties on the kvm host vcpu model Eric Auger
2026-05-26 14:51   ` Sebastian Ott
2026-05-27 15:16   ` Khushit Shah
2026-05-27 15:51     ` Eric Auger
2026-05-27 15:56       ` Khushit Shah
2026-05-27 16:04         ` Eric Auger
2026-05-27 16:11           ` Khushit Shah
2026-05-27 17:20             ` Eric Auger
2026-05-28  5:29               ` Khushit Shah
2026-05-28 17:31                 ` Eric Auger
2026-05-28 15:14             ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 17/18] arm-qmp-cmds: introspection for ID register props Eric Auger
2026-05-27  6:29   ` Sebastian Ott
2026-06-16  8:02     ` Eric Auger
2026-05-27 15:17   ` Khushit Shah
2026-05-27 15:55     ` Eric Auger
2026-05-19 13:27 ` [PATCH v5 18/18] arm/cpu-features: document ID reg properties Eric Auger
2026-05-27  6:37   ` Sebastian Ott
2026-06-04  6:08 ` [PATCH v5 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model Jinqian Yang
2026-06-04  6:32   ` Jinqian Yang
2026-06-04  8:31     ` Eric Auger
2026-06-04 12:00       ` Jinqian Yang

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