Re: [PATCH v20 05/14] KVM: arm64: Set PSTATE.EXLOCK when entering an exception

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect GCSCR_ELx register selection based on the current context instead of the target exception level.
--

commit 42f10f3e973b268a78dccd02e2f0ddbf5ed384fb
Author: Mark Brown <broonie@kernel.org>

KVM: arm64: Set PSTATE.EXLOCK when entering an exception

This commit implements managing PSTATE.EXLOCK when entering an exception.
When taking an exception to a lower EL, the bit is cleared, and when
entering from the same EL, it is set to GCSCR_ELx.EXLOCKEN.

> diff --git a/arch/arm64/kvm/hyp/exception.c b/arch/arm64/kvm/hyp/exception.c
> index 754e2dc1df54a..85c873644fe90 100644
> --- a/arch/arm64/kvm/hyp/exception.c
> +++ b/arch/arm64/kvm/hyp/exception.c
> @@ -49,6 +49,38 @@ static void __vcpu_write_spsr_und(struct kvm_vcpu *vcpu, u64 val)
>  		vcpu->arch.ctxt.spsr_und = val;
>  }
>  
> +static unsigned long compute_exlock(struct kvm_vcpu *vcpu,
> +				    unsigned long mode,
> +				    unsigned long target_mode)
> +{
> +	u64 gcscr;
[ ... ]
> +	/*
> +	 * When taking an exception to the same EL EXLOCK is set to
> +	 * the effective value of GCSR_ELx.EXLOCKEN.
> +	 */
> +	if (is_hyp_ctxt(vcpu))
> +		gcscr = vcpu_read_sys_reg(vcpu, GCSCR_EL2);
> +	else
> +		gcscr = vcpu_read_sys_reg(vcpu, GCSCR_EL1);

[Severity: Medium]
Could compute_exlock() read the wrong register when a nested guest
configures HCR_EL2.TGE = 1 while operating in EL1?

If KVM injects an exception to EL1 in this state (where target_mode is
PSR_MODE_EL1h), is_hyp_ctxt(vcpu) will evaluate to true because TGE is set.

This would cause the hypervisor to read GCSCR_EL2 instead of GCSCR_EL1,
leading to an incorrect PSTATE.EXLOCK value for the injected exception.

While a nested guest executing in EL1 with TGE=1 is architecturally
unpredictable in hardware, KVM's software model typically avoids
cross-wiring registers for different exception levels.

Should this logic strictly use the explicitly passed target_mode to
determine the target exception level, similar to how enter_exception64()
handles VBAR and SCTLR?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260901-arm64-gcs-v20-0-f31750bdfadb@kernel.org?part=5