From: Oliver Upton <oupton@kernel.org>
To: kvmarm@lists.linux.dev
Cc: Marc Zyngier <maz@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Wei-Lin Chang <weilin.chang@arm.com>,
Steffen Eiden <seiden@linux.ibm.com>,
Fuad Tabba <fuad.tabba@linux.dev>,
Leonardo Bras <leo.bras@arm.com>,
Oliver Upton <oupton@kernel.org>
Subject: [PATCH v2 11/28] KVM: arm64: Use a struct for stage-1 walk context
Date: Fri, 23 Oct 2026 13:55:53 -0700 [thread overview]
Message-ID: <20261023205610.1044532-12-oupton@kernel.org> (raw)
In-Reply-To: <20261023205610.1044532-1-oupton@kernel.org>
Consolidate the current walk step in a struct such that helpers can be
spun off from the core implementation.
Reviewed-by: Leonardo Bras <leo.bras@arm.com>
Signed-off-by: Oliver Upton <oupton@kernel.org>
---
arch/arm64/kvm/at.c | 94 ++++++++++++++++++++++++---------------------
1 file changed, 51 insertions(+), 43 deletions(-)
diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c
index fe1d8a674d64..dcbe5563baa2 100644
--- a/arch/arm64/kvm/at.c
+++ b/arch/arm64/kvm/at.c
@@ -427,6 +427,14 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
return -EFAULT;
}
+struct s1_walk_step {
+ u64 desc;
+ u64 desc_ipa;
+ u64 desc_pa;
+ struct kvm_s2_trans s2_trans;
+ int level;
+};
+
static int kvm_read_s1_desc(struct kvm_vcpu *vcpu, u64 pa, u64 *desc,
struct s1_walk_info *wi)
{
@@ -466,12 +474,12 @@ static void compute_s1_permissions(struct kvm_vcpu *vcpu,
static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
struct s1_walk_result *wr, struct kvm_walk_access *access)
{
- u64 va_top, va_bottom, baddr, desc, new_desc, ipa, va;
- struct kvm_s2_trans s2_trans = {};
- int level, stride, ret;
+ u64 va_top, va_bottom, baddr, new_desc, va;
+ struct s1_walk_step ws = {};
+ int stride, ret;
va = access->ia;
- level = wi->sl;
+ ws.level = wi->sl;
stride = wi->pgshift - 3;
baddr = wi->baddr;
@@ -480,15 +488,15 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
while (1) {
u64 index;
- va_bottom = (3 - level) * stride + wi->pgshift;
+ va_bottom = (3 - ws.level) * stride + wi->pgshift;
index = (va & GENMASK_ULL(va_top, va_bottom)) >> (va_bottom - 3);
- ipa = baddr | index;
+ ws.desc_ipa = ws.desc_pa = baddr | index;
if (wi->s2) {
struct kvm_walk_access s2_access = {
.type = WALK_ACCESS_S1PTW,
- .ia = ipa,
+ .ia = ws.desc_ipa,
/*
* R_JCXVS, stage-2 dirty state can be updated
@@ -498,25 +506,25 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
.write = wi->ha,
};
- ret = kvm_walk_nested_s2(vcpu, &s2_access, &s2_trans);
+ ret = kvm_walk_nested_s2(vcpu, &s2_access, &ws.s2_trans);
if (ret == -EAGAIN)
return ret;
if (ret) {
fail_s1_walk(wr,
- (s2_trans.esr & ~ESR_ELx_FSC_LEVEL) | level,
+ (ws.s2_trans.esr & ~ESR_ELx_FSC_LEVEL) | ws.level,
true);
return ret;
}
- if (!s2_trans.readable) {
- fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(level),
+ if (!ws.s2_trans.readable) {
+ fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(ws.level),
true);
return -EPERM;
}
- ipa = s2_trans.output;
+ ws.desc_pa = ws.s2_trans.output;
}
if (wi->filter) {
@@ -524,40 +532,40 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
{
.wi = wi,
.table_ipa = baddr,
- .level = level,
+ .level = ws.level,
}, wi->filter->priv);
if (ret)
return ret;
}
- ret = kvm_read_s1_desc(vcpu, ipa, &desc, wi);
+ ret = kvm_read_s1_desc(vcpu, ws.desc_pa, &ws.desc, wi);
if (ret) {
- fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(level), false);
+ fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(ws.level), false);
return ret;
}
- new_desc = desc;
+ new_desc = ws.desc;
/* Invalid descriptor */
- if (!(desc & BIT(0)))
+ if (!(ws.desc & BIT(0)))
goto transfault;
/* Block mapping, check validity down the line */
- if (!(desc & BIT(1)))
+ if (!(ws.desc & BIT(1)))
break;
/* Page mapping */
- if (level == 3)
+ if (ws.level == 3)
break;
/* Table handling */
if (!wi->hpd) {
- wr->APTable |= FIELD_GET(S1_TABLE_AP, desc);
- wr->UXNTable |= FIELD_GET(PMD_TABLE_UXN, desc);
- wr->PXNTable |= FIELD_GET(PMD_TABLE_PXN, desc);
+ wr->APTable |= FIELD_GET(S1_TABLE_AP, ws.desc);
+ wr->UXNTable |= FIELD_GET(PMD_TABLE_UXN, ws.desc);
+ wr->PXNTable |= FIELD_GET(PMD_TABLE_PXN, ws.desc);
}
- baddr = desc_to_oa(wi, desc);
+ baddr = desc_to_oa(wi, ws.desc);
/* Check for out-of-range OA */
if (check_output_size(baddr, wi))
@@ -565,23 +573,23 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
/* Prepare for next round */
va_top = va_bottom - 1;
- level++;
+ ws.level++;
}
/* Block mapping, check the validity of the level */
- if (!(desc & BIT(1))) {
+ if (!(ws.desc & BIT(1))) {
bool valid_block = false;
bool lpa = kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, PARANGE, 52);
switch (BIT(wi->pgshift)) {
case SZ_4K:
- valid_block = level == 1 || level == 2 || (wi->pa52bit && level == 0);
+ valid_block = ws.level == 1 || ws.level == 2 || (wi->pa52bit && ws.level == 0);
break;
case SZ_16K:
- valid_block = level == 2 || (wi->pa52bit && level == 1);
+ valid_block = ws.level == 2 || (wi->pa52bit && ws.level == 1);
break;
case SZ_64K:
- valid_block = level == 2 || (lpa && level == 1);
+ valid_block = ws.level == 2 || (lpa && ws.level == 1);
break;
}
@@ -589,19 +597,19 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
goto transfault;
}
- baddr = desc_to_oa(wi, desc);
+ baddr = desc_to_oa(wi, ws.desc);
if (check_output_size(baddr & GENMASK(52, va_bottom), wi))
goto addrsz;
- va_bottom += contiguous_bit_shift(desc, wi, level);
+ va_bottom += contiguous_bit_shift(ws.desc, wi, ws.level);
wr->failed = false;
- wr->level = level;
- wr->desc = desc;
+ wr->level = ws.level;
+ wr->desc = ws.desc;
wr->pa = baddr & GENMASK(52, va_bottom);
wr->pa |= va & GENMASK_ULL(va_bottom - 1, 0);
- wr->nG = (wi->regime != TR_EL2) && (desc & PTE_NG);
+ wr->nG = (wi->regime != TR_EL2) && (ws.desc & PTE_NG);
if (wr->nG)
wr->asid = get_asid_by_regime(vcpu, wi->regime);
@@ -610,35 +618,35 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
if (wi->ha)
new_desc |= PTE_AF;
- if (new_desc != desc) {
- if (wi->s2 && !s2_trans.writable) {
- fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(level), true);
+ if (new_desc != ws.desc) {
+ if (wi->s2 && !ws.s2_trans.writable) {
+ fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(ws.level), true);
return -EPERM;
}
- ret = kvm_swap_s1_desc(vcpu, ipa, desc, new_desc, wi);
+ ret = kvm_swap_s1_desc(vcpu, ws.desc_pa, ws.desc, new_desc, wi);
if (ret == -EAGAIN)
return ret;
if (ret) {
- fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(level), false);
+ fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(ws.level), false);
return ret;
}
- desc = new_desc;
+ ws.desc = new_desc;
}
- if (!(desc & PTE_AF)) {
- fail_s1_walk(wr, ESR_ELx_FSC_ACCESS_L(level), false);
+ if (!(ws.desc & PTE_AF)) {
+ fail_s1_walk(wr, ESR_ELx_FSC_ACCESS_L(ws.level), false);
return -EACCES;
}
return 0;
addrsz:
- fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(level), false);
+ fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(ws.level), false);
return -EINVAL;
transfault:
- fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(level), false);
+ fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(ws.level), false);
return -ENOENT;
}
--
2.47.3
next prev parent reply other threads:[~2026-10-23 20:56 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-23 20:55 [PATCH v2 00/28] KVM: arm64: nv: Implement FEAT_HAFDBS, FEAT_HAFT Oliver Upton
2026-10-23 20:55 ` [PATCH v2 01/28] KVM: arm64: nv: Introduce struct for stage-2 walk step Oliver Upton
2026-10-23 20:55 ` [PATCH v2 02/28] KVM: arm64: nv: Consolidate computation of stage-2 permissions Oliver Upton
2026-10-23 20:55 ` [PATCH v2 03/28] KVM: arm64: nv: Get rid of kvm_s2_trans*() accessors Oliver Upton
2026-10-23 20:55 ` [PATCH v2 04/28] KVM: arm64: nv: Only shadow writable-dirty guest descs as writable Oliver Upton
2026-10-23 21:25 ` sashiko-bot
2026-10-24 6:26 ` Oliver Upton
2026-10-23 20:55 ` [PATCH v2 05/28] KVM: arm64: nv: Pass an access descriptor for stage-2 walks Oliver Upton
2026-10-23 20:55 ` [PATCH v2 06/28] KVM: arm64: nv: Use a helper for stage-2 descriptor updates Oliver Upton
2026-10-23 20:55 ` [PATCH v2 07/28] KVM: arm64: nv: Set dirty state at stage-2 Oliver Upton
2026-10-23 20:55 ` [PATCH v2 08/28] KVM: arm64: nv: Treat DBM as writable " Oliver Upton
2026-10-23 20:55 ` [PATCH v2 09/28] KVM: arm64: Compute S1 permissions as part of s1_walk() Oliver Upton
2026-10-23 20:55 ` [PATCH v2 10/28] KVM: arm64: Plumb through access descriptor for stage-1 Oliver Upton
2026-10-23 21:06 ` sashiko-bot
2026-10-23 20:55 ` Oliver Upton [this message]
2026-10-23 20:55 ` [PATCH v2 12/28] KVM: arm64: Create helper for stage-1 descriptor updates Oliver Upton
2026-10-23 20:55 ` [PATCH v2 13/28] KVM: arm64: Set dirty state at stage-1 Oliver Upton
2026-10-23 20:55 ` [PATCH v2 14/28] KVM: arm64: nv: Respect HA when computing translated TCR Oliver Upton
2026-10-23 20:55 ` [PATCH v2 15/28] KVM: arm64: nv: Respect HD " Oliver Upton
2026-10-23 20:55 ` [PATCH v2 16/28] KVM: arm64: Grant write permission when DBM is set at S1 Oliver Upton
2026-10-23 20:55 ` [PATCH v2 17/28] KVM: arm64: Don't update descriptors for "non-arch" access Oliver Upton
2026-10-23 20:56 ` [PATCH v2 18/28] KVM: arm64: nv: Emulate CMOs via writable-clean translations as NOPs Oliver Upton
2026-10-23 20:56 ` [PATCH v2 19/28] arm64: Add command line switch to disable FEAT_S2FWB Oliver Upton
2026-10-23 20:56 ` [PATCH v2 20/28] KVM: arm64: Reject non-coherent DMA when using forced writeback Oliver Upton
2026-10-23 21:16 ` sashiko-bot
2026-10-23 20:56 ` [PATCH v2 21/28] KVM: arm64: nv: Expose FEAT_HAFDBS Oliver Upton
2026-10-23 20:56 ` [PATCH v2 22/28] KVM: arm64: Set Access flag on table descriptors at stage-1 Oliver Upton
2026-10-23 21:22 ` sashiko-bot
2026-10-24 6:24 ` Oliver Upton
2026-10-23 20:56 ` [PATCH v2 23/28] KVM: arm64: nv: Set access flag on table descriptors at stage-2 Oliver Upton
2026-10-23 20:56 ` [PATCH v2 24/28] KVM: arm64: nv: Expose FEAT_HAFT Oliver Upton
2026-10-23 20:56 ` [PATCH v2 25/28] KVM: arm64: selftests: Only test AF behavior for emulated AT insns Oliver Upton
2026-10-23 20:56 ` [PATCH v2 26/28] KVM: arm64: selftests: Test AT emulation for FEAT_HAFT Oliver Upton
2026-10-23 20:56 ` [PATCH v2 27/28] KVM: arm64: Add tracepoints for S1 page table walk Oliver Upton
2026-10-23 20:56 ` [PATCH v2 28/28] KVM: arm64: Add tracepoints for S2 " Oliver Upton
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