Re: HCPTR cp15 writes need isb?

[Marc Zyngier <marc.zyngier@arm.com>]

On 16/06/15 18:51, Vikram Sethi wrote:
> On 06/16/15 07:47, Marc Zyngier wrote:
>> On 16/06/15 13:30, Vikram Sethi wrote:
>>> On 06/16/15 01:46, Marc Zyngier wrote:
>>>> On Tue, 16 Jun 2015 02:34:23 +0100
>>>> Vikram Sethi <vikrams@codeaurora.org> wrote:
>>>>
>>>> Hi Vikram,
>>>>
>>>>> Hi Marc, Christoffer, Catalin, Will,
>>>>>
>>>>> I'm seeing an issue with KVM HCPTR (cp15) writes on guest entry/exit
>>>>> on one of Qualcomm's CPU cores in AArch32 host and AArch32 guest
>>>>> mode. Our CPU architects believe that HCPTR cp15 writes are context
>>>>> changing and require an isb. With an isb in set_hcptr macro in
>>>>> arch/arm/kvm/interrupts_head.S I am able to boot the Aarch32 guest,
>>>>> but without it, I see strange crashes to hyp_undef or hyp_pabt.
>>>> [...]
>>>>
>>>> Can you look at the following patch (queued for 4.2)?
>>>>
>>>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/330955.html
>>>>
>>>> Please let me know if this solves the issue you are seeing.
>>> Don't we have the same issue the first time guest touches FP and
>>> traps i.e in switch_to_guest_vfp where we turn on floating point
>>> access in HCPTR and immediately access FPEXC in store_vfp_state
>>> without a isb?
>> Good point, looks like my initial fix is incomplete. I'll repost a more
>> complete fix but in the meantime, does adding the following work for you?
> Yes, the additional isb in switch_to_guest_vfp along with your original patch works for me.
> When you refactor the original patch will it be cleaner to handle the
> isb in the set_hcptr macro whenever it is changed to not trap VFP
> access?

That's what I have done, but the result is a bit awkward, so I'm in two
minds about it. I'll post it in a minute, please check that it still
works for you (though I've checked that the generated code is the same).

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...