Re: [PATCH v2 0/6] KVM: arm64: EL2 PMU handling fixes

[Marc Zyngier <maz@kernel.org>]

On Wed, 09 Apr 2025 21:31:31 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
> 
> On Wed, Apr 09, 2025 at 05:01:00PM +0100, Marc Zyngier wrote:
> > Joey reports that some of his PMU tests do not behave quite as
> > expected:
> > 
> > - MDCR_EL2.HPMN is set to 0 out of reset
> > 
> > - PMCR_EL0.P should reset all the counters when written from EL2
> > 
> > Oliver points out that setting PMCR_EL0.N from userspace by writing to
> > the register is silly with NV, and that we need a new PMU attribute
> > instead.
> > 
> > On top of that, I figured out that we had a number of little gotchas:
> > 
> > - It is possible for a guest to write an HPMN value that is out of
> >   bound, and it seems valuable to limit it
> > 
> > - PMCR_EL0.N should be the maximum number of counters when read from
> >   EL2, and MDCR_EL2.HPMN when read from EL0/EL1
> > 
> > - Prevent userspace from updating PMCR_EL0.N when EL2 is available
> > 
> > I haven't added any Cc stable, as NV is not functional upstream yet.
> 
> Similarly, I don't see a compelling reason for this to go in as a fix
> for 6.15, especially since you're adding new UAPI. Do you mind grabbing
> it for the next merge window?
> 
> With the comments addressed:
> 
> Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

Thanks. I'll repost the whole thing next week and queue it for 6.16.

	M.

-- 
Without deviation from the norm, progress is not possible.