Re: [PATCH 1/3] KVM: arm64: Only read HPFAR_EL2 when value is architecturally valid

[Oliver Upton <oliver.upton@linux.dev>]

On Wed, Apr 02, 2025 at 12:30:29PM +0100, Marc Zyngier wrote:
> On Wed, 02 Apr 2025 12:15:52 +0100,
> Marc Zyngier <maz@kernel.org> wrote:
> > 
> > On Tue, 01 Apr 2025 23:42:32 +0100,
> > Oliver Upton <oliver.upton@linux.dev> wrote:
> > > 
> > > KVM's logic for deciding when HPFAR_EL2 is UNKNOWN doesn't align with
> > > the architecture. Most notably, KVM assumes HPFAR_EL2 contains the
> > > faulting IPA even in the case of an SEA.
> > > 
> > > Align the logic with the architecture rather than attempting to
> > > paraphrase it. Additionally, take the opportunity to improve the
> > > language around ARM erratum #834220 such that it actually describes the
> > > bug.
> > > 
> > > Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
> > > ---
> > >  arch/arm64/include/asm/esr.h           |  1 +
> > >  arch/arm64/kvm/hyp/include/hyp/fault.h | 46 ++++++++++++++++----------
> > >  2 files changed, 29 insertions(+), 18 deletions(-)
> > > 
> > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
> > > index d1b1a33f9a8b..7b096ed87360 100644
> > > --- a/arch/arm64/include/asm/esr.h
> > > +++ b/arch/arm64/include/asm/esr.h
> > > @@ -121,6 +121,7 @@
> > >  #define ESR_ELx_FSC_SEA_TTW(n)	(0x14 + (n))
> > >  #define ESR_ELx_FSC_SECC	(0x18)
> > >  #define ESR_ELx_FSC_SECC_TTW(n)	(0x1c + (n))
> > > +#define ESR_ELx_FSC_ADDRESS	(0x00)
> > 
> > I think this should probably read "ADDRESS_SIZE", rather than just
> > "ADDRESS".
> 
> Actually, we have
> 
> #define ESR_ELx_FSC_ADDRSZ	(0x00)
> 
> since
> 
> 61e30b9eef7f ("KVM: arm64: nv: Implement nested Stage-2 page table walk logic")
> 
> It just isn't at the expected spot.

Durrrrr :)

Thanks,
Oliver