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From: Yeoreum Yun <yeoreum.yun@arm.com>
To: Dave Martin <Dave.Martin@arm.com>
Cc: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org,
	oliver.upton@linux.dev, anshuman.khandual@arm.com,
	robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com,
	joey.gouly@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com,
	scott@os.amperecomputing.com, mbenes@suse.cz,
	james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org,
	pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	kvmarm@lists.linux.dev
Subject: Re: [PATCH v3 4/5] arm64: initialise SCTLR2_EL1 at cpu_soft_restart()
Date: Wed, 20 Aug 2025 18:32:34 +0100	[thread overview]
Message-ID: <aKYGsqCTRXwnb6Gw@e129823.arm.com> (raw)
In-Reply-To: <aKXlnZ8HXHBZMj4T@e133380.arm.com>

Hi Dave,

> On Wed, Aug 13, 2025 at 01:01:17PM +0100, Yeoreum Yun wrote:
> > SCTLR2_EL1 register is optional starting from ARMv8.8/ARMv9.3,
> > and becomes mandatory from ARMv8.9/ARMv9.4
> > and serveral architectural feature are controled by bits in
> > these registers.
> >
> > Before, launching new kernel via kexec, initialise SCTLR2_EL1 explicitly.
> >
> > Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> > ---
> >  arch/arm64/kernel/cpu-reset.S | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S
> > index c87445dde674..123564af345b 100644
> > --- a/arch/arm64/kernel/cpu-reset.S
> > +++ b/arch/arm64/kernel/cpu-reset.S
> > @@ -37,6 +37,12 @@ SYM_TYPED_FUNC_START(cpu_soft_restart)
> >  	 * regime if HCR_EL2.E2H == 1
> >  	 */
> >  	msr	sctlr_el1, x12
> > +
> > +alternative_if ARM64_HAS_SCTLR2
> > +	mov_q	x12, INIT_SCTLR2_EL1
> > +	msr_s	SYS_SCTLR2_EL1, x12
> > +alternative_else_nop_endif
> > +
>
> It would be better to do this based on the ID regs.
>
> Although the previous kernel _shouldn't_ have used SCTLR2 if the
> capability ARM64_HAS_SCTLR2 did not get enabled, it would be better to
> enforce a clean state here for the new kernel.
>
> If so, maybe one of the macros that you already defined can be used
> here?  (But it's also fine to open-code it.)

But cpu_soft_restart() can be called before capability is enabled?
I think this function is called after "capability" setup,
Was it good to use alternative than check the ID register?

>
> >  	isb
> >
> >  	cbz	x0, 1f				// el2_switch?
>
> [...]
>
> In the case where the el2_switch argument in non-zero, don't we also
> need to do something to reinitialise SCTLR2_EL2 after switching back
> to EL2, in the HVC_SOFT_RESTART handler?
>
> Maybe I missed something.

No. I'm missing to init in NVHE's HVC_SOFT_RESTART handler to clear SCTLR2_EL2.

Thanks!

>
> Cheers
> ---Dave

--
Sincerely,
Yeoreum Yun

  reply	other threads:[~2025-08-20 17:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-13 12:01 [PATCH v3 0/5] initialize SCTRL2_ELx Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 1/5] arm64: make SCTLR2_EL1 accessible Yeoreum Yun
2025-08-20 15:10   ` Dave Martin
2025-08-20 18:51     ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 2/5] arm64: initialise SCTLR2_ELx register at boot time Yeoreum Yun
2025-08-20 15:10   ` Dave Martin
2025-08-20 17:18     ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 3/5] arm64: save/restore SCTLR2_EL1 when cpu_suspend()/resume() Yeoreum Yun
2025-08-20 15:11   ` Dave Martin
2025-08-20 17:22     ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 4/5] arm64: initialise SCTLR2_EL1 at cpu_soft_restart() Yeoreum Yun
2025-08-20 15:11   ` Dave Martin
2025-08-20 17:32     ` Yeoreum Yun [this message]
2025-09-01 15:01       ` Dave Martin
2025-08-21 10:14     ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 5/5] arm64: make the per-task SCTLR2_EL1 Yeoreum Yun
2025-08-20 15:11   ` Dave Martin
2025-08-20 17:34     ` Yeoreum Yun
2025-08-20 15:11 ` [PATCH v3 0/5] initialize SCTRL2_ELx Dave Martin

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