From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Will Deacon <will@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: Marc Zyngier <maz@kernel.org>,
kernel-team@android.com, linux-arm-kernel@lists.infradead.org,
Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: [PATCH v3 02/21] KVM: arm64: Add stand-alone page-table walker infrastructure
Date: Fri, 28 Aug 2020 16:43:20 +0100 [thread overview]
Message-ID: <c4fce7a6-352e-ff01-65e6-5da49f24224c@arm.com> (raw)
In-Reply-To: <9de812eb-1067-08bf-69cd-eb205dfbda35@arm.com>
Hi,
I've had another good look at the code, and I now I can answer some of my own
questions. Sorry for the noise!
On 8/27/20 5:27 PM, Alexandru Elisei wrote:
> [..]
> +
> + if (!table) {
> + data->addr += kvm_granule_size(level);
> + goto out;
> + }
> +
> + childp = kvm_pte_follow(pte);
> + ret = __kvm_pgtable_walk(data, childp, level + 1);
> + if (ret)
> + goto out;
> +
> + if (flags & KVM_PGTABLE_WALK_TABLE_POST) {
> We check that ptep is a valid table when we test the KVM_PGTABLE_WALK_TABLE_PRE
> flag, why aren't we doing that here?
That's because the function goes to out if the leaf visitor didn't turn the leaf
entry into a table.
>
>> + ret = kvm_pgtable_visitor_cb(data, addr, level, ptep,
>> + KVM_PGTABLE_WALK_TABLE_POST);
>> + }
>> +
>> +out:
>> + return ret;
>> +}
>> +
>> [..]
>> +}
>> +
>> +static int _kvm_pgtable_walk(struct kvm_pgtable_walk_data *data)
>> +{
>> + u32 idx;
>> + int ret = 0;
>> + struct kvm_pgtable *pgt = data->pgt;
>> + u64 limit = BIT(pgt->ia_bits);
>> +
>> + if (data->addr > limit || data->end > limit)
>> + return -ERANGE;
>> +
>> + if (!pgt->pgd)
>> + return -EINVAL;
>> +
>> + for (idx = kvm_pgd_page_idx(data); data->addr < data->end; ++idx) {
>> + kvm_pte_t *ptep = &pgt->pgd[idx * PTRS_PER_PTE];
> I'm sorry, but I just don't understand this part:
>
> - Why do we skip over PTRS_PER_PTE instead of visiting each idx?
>
> - Why do we use PTRS_PER_PTE instead of PTRS_PER_PGD?
>
> Would you mind explaining what the loop is doing?
>
> I also don't see anywhere in the page table walking code where we take into
> account that we can have concatenated tables at level 1 or 2, which means we have
> more entries than PTRS_PER_P{U,M}D.
I think I understand the code better now, __kvm_pgtable_walk will visit all
entries in the range ptep[0..PTRS_PER_PTE-1], that's why every iteration we
increment by PTRS_PER_PTE.
>
>> +
>> + ret = __kvm_pgtable_walk(data, ptep, pgt->start_level);
>> + if (ret)
>> + break;
>> + }
>> +
>> + return ret;
>> +}
>> +
>> +int kvm_pgtable_walk(struct kvm_pgtable *pgt, u64 addr, u64 size,
>> + struct kvm_pgtable_walker *walker)
>> +{
>> + struct kvm_pgtable_walk_data walk_data = {
>> + .pgt = pgt,
>> + .addr = ALIGN_DOWN(addr, PAGE_SIZE),
>> + .end = PAGE_ALIGN(walk_data.addr + size),
> [..]
>
> What happens if addr < PAGE_SIZE - 1? It looks to me that according to the
> definition of ALIGN_DOWN, addr will wrap around.
My mistake again, ALIGN_DOWN will subtract PAGE_SIZE - 1, but __ALIGN_KERNEL will
add PAGE_SIZE - 1, and the result is what we expect (no wrapping around).
Thanks,
Alex
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next prev parent reply other threads:[~2020-08-28 15:42 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-25 9:39 [PATCH v3 00/21] KVM: arm64: Rewrite page-table code and fault handling Will Deacon
2020-08-25 9:39 ` [PATCH v3 01/21] KVM: arm64: Remove kvm_mmu_free_memory_caches() Will Deacon
2020-08-25 9:39 ` [PATCH v3 02/21] KVM: arm64: Add stand-alone page-table walker infrastructure Will Deacon
2020-08-27 16:27 ` Alexandru Elisei
2020-08-28 15:43 ` Alexandru Elisei [this message]
2020-09-02 10:36 ` Will Deacon
2020-08-28 15:51 ` Alexandru Elisei
2020-09-02 10:49 ` Will Deacon
2020-09-02 6:31 ` Gavin Shan
2020-09-02 11:02 ` Will Deacon
2020-09-03 1:11 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 03/21] KVM: arm64: Add support for creating kernel-agnostic stage-1 page tables Will Deacon
2020-08-28 15:35 ` Alexandru Elisei
2020-09-02 10:06 ` Will Deacon
2020-08-25 9:39 ` [PATCH v3 04/21] KVM: arm64: Use generic allocator for hyp stage-1 page-tables Will Deacon
2020-08-28 16:32 ` Alexandru Elisei
2020-09-02 11:35 ` Will Deacon
2020-09-02 14:48 ` Alexandru Elisei
2020-08-25 9:39 ` [PATCH v3 05/21] KVM: arm64: Add support for creating kernel-agnostic stage-2 page tables Will Deacon
2020-09-02 6:40 ` Gavin Shan
2020-09-02 11:30 ` Will Deacon
2020-08-25 9:39 ` [PATCH v3 06/21] KVM: arm64: Add support for stage-2 map()/unmap() in generic page-table Will Deacon
2020-09-01 16:24 ` Alexandru Elisei
2020-09-02 11:46 ` Will Deacon
2020-09-03 2:57 ` Gavin Shan
2020-09-03 5:27 ` Gavin Shan
2020-09-03 11:18 ` Gavin Shan
2020-09-03 12:30 ` Will Deacon
2020-09-03 16:15 ` Will Deacon
2020-09-04 0:47 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 07/21] KVM: arm64: Convert kvm_phys_addr_ioremap() to generic page-table API Will Deacon
2020-09-01 17:08 ` Alexandru Elisei
2020-09-02 11:48 ` Will Deacon
2020-09-03 3:57 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 08/21] KVM: arm64: Convert kvm_set_spte_hva() " Will Deacon
2020-09-02 15:37 ` Alexandru Elisei
2020-09-03 16:37 ` Will Deacon
2020-09-03 4:13 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 09/21] KVM: arm64: Convert unmap_stage2_range() " Will Deacon
2020-09-02 16:23 ` Alexandru Elisei
2020-09-02 18:44 ` Alexandru Elisei
2020-09-03 17:57 ` Will Deacon
2020-09-08 13:07 ` Alexandru Elisei
2020-09-09 10:57 ` Alexandru Elisei
2020-09-03 4:19 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 10/21] KVM: arm64: Add support for stage-2 page-aging in generic page-table Will Deacon
2020-09-03 4:33 ` Gavin Shan
2020-09-03 16:48 ` Will Deacon
2020-09-04 1:01 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 11/21] KVM: arm64: Convert page-aging and access faults to generic page-table API Will Deacon
2020-09-03 4:37 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 12/21] KVM: arm64: Add support for stage-2 write-protect in generic page-table Will Deacon
2020-09-03 4:47 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 13/21] KVM: arm64: Convert write-protect operation to generic page-table API Will Deacon
2020-09-03 4:48 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 14/21] KVM: arm64: Add support for stage-2 cache flushing in generic page-table Will Deacon
2020-09-03 4:51 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 15/21] KVM: arm64: Convert memslot cache-flushing code to generic page-table API Will Deacon
2020-09-03 4:52 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 16/21] KVM: arm64: Add support for relaxing stage-2 perms in generic page-table code Will Deacon
2020-09-03 4:55 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 17/21] KVM: arm64: Convert user_mem_abort() to generic page-table API Will Deacon
2020-09-03 6:05 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 18/21] KVM: arm64: Check the pgt instead of the pgd when modifying page-table Will Deacon
2020-09-03 5:00 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 19/21] KVM: arm64: Remove unused page-table code Will Deacon
2020-09-03 6:02 ` Gavin Shan
2020-08-25 9:39 ` [PATCH v3 20/21] KVM: arm64: Remove unused 'pgd' field from 'struct kvm_s2_mmu' Will Deacon
2020-09-03 5:07 ` Gavin Shan
2020-09-03 16:50 ` Will Deacon
2020-09-04 0:59 ` Gavin Shan
2020-09-04 10:02 ` Marc Zyngier
2020-08-25 9:39 ` [PATCH v3 21/21] KVM: arm64: Don't constrain maximum IPA size based on host configuration Will Deacon
2020-09-03 5:09 ` Gavin Shan
2020-08-27 16:26 ` [PATCH v3 00/21] KVM: arm64: Rewrite page-table code and fault handling Alexandru Elisei
2020-09-01 16:15 ` Will Deacon
2020-09-03 7:34 ` Gavin Shan
2020-09-03 11:13 ` Gavin Shan
2020-09-03 11:48 ` Gavin Shan
2020-09-03 12:16 ` Will Deacon
2020-09-04 0:51 ` Gavin Shan
2020-09-04 10:07 ` Marc Zyngier
2020-09-05 3:56 ` Gavin Shan
2020-09-05 9:33 ` Marc Zyngier
2020-09-07 9:27 ` Will Deacon
2020-09-03 18:52 ` Will Deacon
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