From: Hans de Goede <hdegoede@redhat.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Jani Nikula" <jani.nikula@linux.intel.com>,
"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
"Len Brown" <lenb@kernel.org>
Cc: Hans de Goede <hdegoede@redhat.com>,
linux-pwm@vger.kernel.org,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel@lists.freedesktop.org,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-acpi@vger.kernel.org
Subject: [PATCH 03/16] pwm: lpss: Add range limit check for the base_unit register value
Date: Sat, 6 Jun 2020 22:25:48 +0200 [thread overview]
Message-ID: <20200606202601.48410-4-hdegoede@redhat.com> (raw)
In-Reply-To: <20200606202601.48410-1-hdegoede@redhat.com>
When the user requests a high enough period ns value, then the
calculations in pwm_lpss_prepare() might result in a base_unit value of 0.
But according to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM output frequency. Adding 0
to the counter is a no-op. The data-sheet even explicitly states that
writing 0 to the base_unit bits will result in the PWM outputting a
continuous 0 signal.
base_unit values > (base_unit_range / 256), or iow base_unit values using
the 8 most significant bits, cause loss of resolution of the duty-cycle.
E.g. assuming a base_unit_range of 65536 steps, then a base_unit value of
768 (256 * 3), limits the duty-cycle resolution to 65536 / 768 = 85 steps.
Clamp the max base_unit value to base_unit_range / 32 to ensure a
duty-cycle resolution of at least 32 steps. This limits the maximum
output frequency to 600 KHz / 780 KHz depending on the base clock.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
drivers/pwm/pwm-lpss.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index 9d965ffe66d1..cae74ce61654 100644
--- a/drivers/pwm/pwm-lpss.c
+++ b/drivers/pwm/pwm-lpss.c
@@ -97,6 +97,14 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
freq *= base_unit_range;
base_unit = DIV_ROUND_CLOSEST_ULL(freq, c);
+ /*
+ * base_unit must not be 0 and for values > (base_unit_range / 256)
+ * (values using the 8 most significant bits) the duty-cycle resolution
+ * degrades. Clamp the maximum value to base_unit_range / 32 which
+ * leaves a duty-cycle resolution of 32 steps.
+ */
+ base_unit = clamp_t(unsigned long long, base_unit, 1,
+ base_unit_range / 32);
on_time_div = 255ULL * duty_ns;
do_div(on_time_div, period_ns);
@@ -105,7 +113,6 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,
orig_ctrl = ctrl = pwm_lpss_read(pwm);
ctrl &= ~PWM_ON_TIME_DIV_MASK;
ctrl &= ~(base_unit_range << PWM_BASE_UNIT_SHIFT);
- base_unit &= base_unit_range;
ctrl |= (u32) base_unit << PWM_BASE_UNIT_SHIFT;
ctrl |= on_time_div;
--
2.26.2
next prev parent reply other threads:[~2020-06-06 20:26 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-06 20:25 pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-06-06 20:25 ` [PATCH 01/16] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-06-06 20:25 ` [PATCH 02/16] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-06-07 17:03 ` Andy Shevchenko
2020-06-07 18:14 ` Hans de Goede
2020-06-06 20:25 ` Hans de Goede [this message]
2020-06-06 20:25 ` [PATCH 04/16] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Hans de Goede
2020-06-06 20:25 ` [PATCH 05/16] pwm: lpss: Set SW_UPDATE bit when enabling the PWM Hans de Goede
2020-06-06 20:25 ` [PATCH 06/16] pwm: lpss: Add debug prints, test patch for moving i915 to atomic PWM Hans de Goede
2020-06-06 20:25 ` [PATCH 07/16] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-06-06 20:25 ` [PATCH 08/16] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-06-06 20:25 ` [PATCH 09/16] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-06-06 20:25 ` [PATCH 10/16] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-06-06 20:25 ` [PATCH 11/16] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-06-06 20:25 ` [PATCH 12/16] pwm: crc: Implement get_state() method Hans de Goede
2020-06-06 20:25 ` [PATCH 13/16] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-06-06 20:25 ` [PATCH 14/16] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-06-06 20:26 ` [PATCH 15/16] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-06-06 20:26 ` [PATCH 16/16] drm/i915: panel: Use atomic PWM API " Hans de Goede
2020-06-07 18:15 ` pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-06-08 14:35 ` Daniel Vetter
2020-06-11 21:21 ` Uwe Kleine-König
2020-06-12 17:04 ` Hans de Goede
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