* [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers @ 2022-10-27 3:14 LeoLiu-oc 2022-10-27 4:17 ` Sathyanarayanan Kuppuswamy 2022-10-27 22:09 ` Bjorn Helgaas 0 siblings, 2 replies; 7+ messages in thread From: LeoLiu-oc @ 2022-10-27 3:14 UTC (permalink / raw) To: rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel Cc: CobeChen, TonyWWang, ErosZhang, leoliu-oc From: leoliu-oc <leoliu-oc@zhaoxin.com> HEST PCIE AER error source information describes the Uncorrectable Error Severity, CorrectableError Mask and other aer register's value to write to the bridge's Correctable Error Mask register. leoliu-oc (5): ACPI/APEI: Add apei_hest_parse_aer() ACPI/APEI: remove static from apei_hest_parse() ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges ACPI/PCI: Add pci_acpi_program_hest_aer_params() ACPI/PCI: config pcie devices's aer register drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++- drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++ drivers/pci/pci.h | 5 ++ drivers/pci/probe.c | 1 + include/acpi/actbl1.h | 69 +++++++++++++++++++ include/acpi/apei.h | 9 +++ include/uapi/linux/pci_regs.h | 5 ++ 7 files changed, 300 insertions(+), 2 deletions(-) -- 2.20.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers 2022-10-27 3:14 [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers LeoLiu-oc @ 2022-10-27 4:17 ` Sathyanarayanan Kuppuswamy 2022-10-28 11:19 ` LeoLiuoc 2022-10-27 22:09 ` Bjorn Helgaas 1 sibling, 1 reply; 7+ messages in thread From: Sathyanarayanan Kuppuswamy @ 2022-10-27 4:17 UTC (permalink / raw) To: LeoLiu-oc, rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel Cc: CobeChen, TonyWWang, ErosZhang On 10/26/22 8:14 PM, LeoLiu-oc wrote: > From: leoliu-oc <leoliu-oc@zhaoxin.com> > > HEST PCIE AER error source information describes the Uncorrectable Error > Severity, CorrectableError Mask and other aer register's value to write to the /s/CorrectableError/Correctable Error /s/aer/AER > bridge's Correctable Error Mask register. Can you add spec reference? > > leoliu-oc (5): > ACPI/APEI: Add apei_hest_parse_aer() > ACPI/APEI: remove static from apei_hest_parse() > ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges > ACPI/PCI: Add pci_acpi_program_hest_aer_params() > ACPI/PCI: config pcie devices's aer register > > drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++- > drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++ > drivers/pci/pci.h | 5 ++ > drivers/pci/probe.c | 1 + > include/acpi/actbl1.h | 69 +++++++++++++++++++ > include/acpi/apei.h | 9 +++ > include/uapi/linux/pci_regs.h | 5 ++ > 7 files changed, 300 insertions(+), 2 deletions(-) > -- Sathyanarayanan Kuppuswamy Linux Kernel Developer ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers 2022-10-27 4:17 ` Sathyanarayanan Kuppuswamy @ 2022-10-28 11:19 ` LeoLiuoc 2022-10-28 15:15 ` Bjorn Helgaas 0 siblings, 1 reply; 7+ messages in thread From: LeoLiuoc @ 2022-10-28 11:19 UTC (permalink / raw) To: Sathyanarayanan Kuppuswamy, rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel Cc: CobeChen, TonyWWang, ErosZhang 在 2022/10/27 12:17, Sathyanarayanan Kuppuswamy 写道: > > > On 10/26/22 8:14 PM, LeoLiu-oc wrote: >> From: leoliu-oc <leoliu-oc@zhaoxin.com> >> >> HEST PCIE AER error source information describes the Uncorrectable Error >> Severity, CorrectableError Mask and other aer register's value to write to the > > /s/CorrectableError/Correctable Error > /s/aer/AER Got it. I will modify this in next version patch set. Thanks leoliu-oc > >> bridge's Correctable Error Mask register. > > Can you add spec reference? > Please refer to Section 18.3.2 ACPI Error Source of acpi spec v6.3. Links to the online versions of ACPI Spec 6.3 is https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/18_ACPI_Platform_Error_Interfaces/error-source-discovery.html#acpi-error-source. Section 18.3.2.4 describes PCI Express Root Port AER Structure, section 18.3.2.5 describes PCI Express Device AER Structure, section 18.3.2.6 describes PCI Express/PCI-X Bridge AER Structure. Thanks leoliu-oc >> >> leoliu-oc (5): >> ACPI/APEI: Add apei_hest_parse_aer() >> ACPI/APEI: remove static from apei_hest_parse() >> ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges >> ACPI/PCI: Add pci_acpi_program_hest_aer_params() >> ACPI/PCI: config pcie devices's aer register >> >> drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++- >> drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++ >> drivers/pci/pci.h | 5 ++ >> drivers/pci/probe.c | 1 + >> include/acpi/actbl1.h | 69 +++++++++++++++++++ >> include/acpi/apei.h | 9 +++ >> include/uapi/linux/pci_regs.h | 5 ++ >> 7 files changed, 300 insertions(+), 2 deletions(-) >> > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers 2022-10-28 11:19 ` LeoLiuoc @ 2022-10-28 15:15 ` Bjorn Helgaas 2022-11-01 7:25 ` LeoLiuoc 0 siblings, 1 reply; 7+ messages in thread From: Bjorn Helgaas @ 2022-10-28 15:15 UTC (permalink / raw) To: LeoLiuoc Cc: Sathyanarayanan Kuppuswamy, rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel, CobeChen, TonyWWang, ErosZhang On Fri, Oct 28, 2022 at 07:19:25PM +0800, LeoLiuoc wrote: > 在 2022/10/27 12:17, Sathyanarayanan Kuppuswamy 写道: > > On 10/26/22 8:14 PM, LeoLiu-oc wrote: > > Can you add spec reference? > > > Please refer to Section 18.3.2 ACPI Error Source of acpi spec v6.3. Links to > the online versions of ACPI Spec 6.3 is > https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/18_ACPI_Platform_Error_Interfaces/error-source-discovery.html#acpi-error-source. > > Section 18.3.2.4 describes PCI Express Root Port AER Structure, section > 18.3.2.5 describes PCI Express Device AER Structure, section 18.3.2.6 > describes PCI Express/PCI-X Bridge AER Structure. Thanks. It's OK to have the spec references in the email thread, but the real point is that they should be in the commit log and, when it makes sense, in code comments. Cite the most recent spec version when you can. In this case, I think it is ACPI r6.5. Personally I don't really care for URL references because they tend to get stale over time as websites are reorganized and domains change. Something like "ACPI r6.5, sec 18.3.2.4" is unambiguous and will remain usable forever. Bjorn ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers 2022-10-28 15:15 ` Bjorn Helgaas @ 2022-11-01 7:25 ` LeoLiuoc 0 siblings, 0 replies; 7+ messages in thread From: LeoLiuoc @ 2022-11-01 7:25 UTC (permalink / raw) To: Bjorn Helgaas Cc: Sathyanarayanan Kuppuswamy, rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel, CobeChen, TonyWWang, ErosZhang 在 2022/10/28 23:15, Bjorn Helgaas 写道: > On Fri, Oct 28, 2022 at 07:19:25PM +0800, LeoLiuoc wrote: >> 在 2022/10/27 12:17, Sathyanarayanan Kuppuswamy 写道: >>> On 10/26/22 8:14 PM, LeoLiu-oc wrote: > >>> Can you add spec reference? >>> >> Please refer to Section 18.3.2 ACPI Error Source of acpi spec v6.3. Links to >> the online versions of ACPI Spec 6.3 is >> https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/18_ACPI_Platform_Error_Interfaces/error-source-discovery.html#acpi-error-source. >> >> Section 18.3.2.4 describes PCI Express Root Port AER Structure, section >> 18.3.2.5 describes PCI Express Device AER Structure, section 18.3.2.6 >> describes PCI Express/PCI-X Bridge AER Structure. > > Thanks. It's OK to have the spec references in the email thread, but > the real point is that they should be in the commit log and, when it > makes sense, in code comments. > > Cite the most recent spec version when you can. In this case, I think > it is ACPI r6.5. > > Personally I don't really care for URL references because they tend to > get stale over time as websites are reorganized and domains change. > Something like "ACPI r6.5, sec 18.3.2.4" is unambiguous and will > remain usable forever. > > Bjorn Got it. Thanks for your advice. This will be modified in the next version. Thanks leoliu-oc ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers 2022-10-27 3:14 [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers LeoLiu-oc 2022-10-27 4:17 ` Sathyanarayanan Kuppuswamy @ 2022-10-27 22:09 ` Bjorn Helgaas 2022-10-28 11:23 ` LeoLiuoc 1 sibling, 1 reply; 7+ messages in thread From: Bjorn Helgaas @ 2022-10-27 22:09 UTC (permalink / raw) To: LeoLiu-oc Cc: rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel, CobeChen, TonyWWang, ErosZhang On Thu, Oct 27, 2022 at 11:14:58AM +0800, LeoLiu-oc wrote: > From: leoliu-oc <leoliu-oc@zhaoxin.com> > > HEST PCIE AER error source information describes the Uncorrectable Error > Severity, CorrectableError Mask and other aer register's value to write to the > bridge's Correctable Error Mask register. I guess the point is to extract register values from HEST PCI Express AER structures (ACPI r6.5, sec 18.3.2.4, etc.) and program them into AER Capabilities? > leoliu-oc (5): > ACPI/APEI: Add apei_hest_parse_aer() > ACPI/APEI: remove static from apei_hest_parse() > ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges > ACPI/PCI: Add pci_acpi_program_hest_aer_params() > ACPI/PCI: config pcie devices's aer register If/when you repost this, it would be nice if the patches ([1/5], [2/5], etc) were responses to the cover letter ([0/5]). Since they're not responses, b4 doesn't know they're connected and can't grab the whole series at once. Also capitalize the subject lines consistently and s/PCIE/PCIe/ and s/pcie/PCIe/ and s/aer/AER/, e.g., ACPI/APEI: Add apei_hest_parse_aer() ACPI/APEI: Remove static from apei_hest_parse() PCI: Add AER #defines for PCIe/PCI-X bridges ACPI/PCI: Add pci_acpi_program_hest_aer_params() ACPI/PCI: Configure devices AER registers based on HEST > drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++- > drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++ > drivers/pci/pci.h | 5 ++ > drivers/pci/probe.c | 1 + > include/acpi/actbl1.h | 69 +++++++++++++++++++ > include/acpi/apei.h | 9 +++ > include/uapi/linux/pci_regs.h | 5 ++ > 7 files changed, 300 insertions(+), 2 deletions(-) > > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers 2022-10-27 22:09 ` Bjorn Helgaas @ 2022-10-28 11:23 ` LeoLiuoc 0 siblings, 0 replies; 7+ messages in thread From: LeoLiuoc @ 2022-10-28 11:23 UTC (permalink / raw) To: Bjorn Helgaas Cc: rafael, lenb, james.morse, tony.luck, bp, robert.moore, ying.huang, rdunlap, bhelgaas, linux-acpi, linux-pci, linux-kernel, devel, CobeChen, TonyWWang, ErosZhang 在 2022/10/28 6:09, Bjorn Helgaas 写道: > On Thu, Oct 27, 2022 at 11:14:58AM +0800, LeoLiu-oc wrote: >> From: leoliu-oc <leoliu-oc@zhaoxin.com> >> >> HEST PCIE AER error source information describes the Uncorrectable Error >> Severity, CorrectableError Mask and other aer register's value to write to the >> bridge's Correctable Error Mask register. > > I guess the point is to extract register values from HEST PCI Express > AER structures (ACPI r6.5, sec 18.3.2.4, etc.) and program them into > AER Capabilities? > Yes, the purpose of the patch sets is to extract register values from HEST PCI Express AER structures and program them into AER Capabilities Thanks leoliu-oc >> leoliu-oc (5): >> ACPI/APEI: Add apei_hest_parse_aer() >> ACPI/APEI: remove static from apei_hest_parse() >> ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges >> ACPI/PCI: Add pci_acpi_program_hest_aer_params() >> ACPI/PCI: config pcie devices's aer register > > If/when you repost this, it would be nice if the patches ([1/5], > [2/5], etc) were responses to the cover letter ([0/5]). Since they're > not responses, b4 doesn't know they're connected and can't grab the > whole series at once. > > Also capitalize the subject lines consistently and s/PCIE/PCIe/ and > s/pcie/PCIe/ and s/aer/AER/, e.g., > > ACPI/APEI: Add apei_hest_parse_aer() > ACPI/APEI: Remove static from apei_hest_parse() > PCI: Add AER #defines for PCIe/PCI-X bridges > ACPI/PCI: Add pci_acpi_program_hest_aer_params() > ACPI/PCI: Configure devices AER registers based on HEST Got it. I will modify this in the next version patch set. Thanks leoliu-oc > >> drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++- >> drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++ >> drivers/pci/pci.h | 5 ++ >> drivers/pci/probe.c | 1 + >> include/acpi/actbl1.h | 69 +++++++++++++++++++ >> include/acpi/apei.h | 9 +++ >> include/uapi/linux/pci_regs.h | 5 ++ >> 7 files changed, 300 insertions(+), 2 deletions(-) >> >> -- >> 2.20.1 >> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-11-01 7:25 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-10-27 3:14 [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers LeoLiu-oc 2022-10-27 4:17 ` Sathyanarayanan Kuppuswamy 2022-10-28 11:19 ` LeoLiuoc 2022-10-28 15:15 ` Bjorn Helgaas 2022-11-01 7:25 ` LeoLiuoc 2022-10-27 22:09 ` Bjorn Helgaas 2022-10-28 11:23 ` LeoLiuoc
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