Re: [PATCH 2/3] dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock

From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jian Hu <jian.hu@amlogic.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	robh+dt <robh+dt@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	linux-amlogic <linux-amlogic@lists.infradead.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Ronald Claveau <linux-kernel-dev@aliel.fr>
Subject: Re: [PATCH 2/3] dt-bindings: clock: amlogic: t7: Add missing mpll3 parent clock
Date: Tue, 10 Mar 2026 08:08:30 +0100	[thread overview]
Message-ID: <0f336f9c-455d-4438-8b65-442ba9501e92@kernel.org> (raw)
In-Reply-To: <fb47c7f7-9eb7-4895-8652-3b5329d23752@amlogic.com>

On 10/03/2026 07:51, Jian Hu wrote:
> 
> On 3/6/2026 4:12 PM, Krzysztof Kozlowski wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On Thu, Mar 05, 2026 at 03:43:26PM +0800, Jian Hu wrote:
>>> The mpll3 clock is a valid parent clock for sd_emmc and mipi_isp on
>>> the Amlogic T7 SoC, but was missing from t7-peripherals-clkc.yaml.
>>> Add it to enable proper clock parent configuration for these peripherals.
>>>
>>> Signed-off-by: Jian Hu <jian.hu@amlogic.com>
>>> ---
>>>   .../bindings/clock/amlogic,t7-peripherals-clkc.yaml       | 8 ++++++--
>>>   1 file changed, 6 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
>>> index 55bb73707d58..27cc1f331587 100644
>>> --- a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
>>> +++ b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
>>> @@ -24,7 +24,7 @@ properties:
>>>       const: 1
>>>
>>>     clocks:
>>> -    minItems: 14
>>> +    minItems: 15
>>>       items:
>>>         - description: input oscillator
>>>         - description: input sys clk
>>> @@ -40,12 +40,13 @@ properties:
>>>         - description: input gp1 pll
>>>         - description: input mpll1
>>>         - description: input mpll2
>>> +      - description: input mpll3
>> Nah, ABI break. You add it to the end of the list or provide arguments
>> on ABI impact.
> 
> The third patch in this series enables the DT for the Amlogic T7 clock 
> controller.
> 
> The clock controller node for amlogic,t7-peripherals-clkc has not been 
> merged upstream yet.
> This change modifies the clock index order, but it will not break any 
> existing device tree since the
> amlogic,t7-peripherals-clkc bindings are not used by any upstream or 
> downstream DT at this time.
> 
> Therefore, it does NOT break the ABI.

It does. Clearly visible from the diff above, because the order is the ABI.

> 
> The last clock entry is an external pad input for RTC and it is optional.
> For logical consistency, it is better to place the required mpll3 entry 
> before the optional entry.
> 
> If this change does not break the ABI, could I keep it in its original 
> logical order right after mpll2?

Change breaks the ABI and commit must explain why and the impact.

Best regards,
Krzysztof

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