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* [PATCH v6 0/8] Support for the NPU in Vim3
@ 2022-12-02 11:52 Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset Tomeu Vizoso
                   ` (7 more replies)
  0 siblings, 8 replies; 12+ messages in thread
From: Tomeu Vizoso @ 2022-12-02 11:52 UTC (permalink / raw)
  Cc: italonicola, Tomeu Vizoso, Christian Gmeiner, Daniel Vetter,
	David Airlie,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list:DRM DRIVERS FOR VIVANTE GPU IP,
	moderated list:DRM DRIVERS FOR VIVANTE GPU IP, Jerome Brunet,
	Kevin Hilman, Krzysztof Kozlowski,
	open list:ARM/Amlogic Meson SoC support,
	moderated list:ARM/Amlogic Meson SoC support, open list,
	Lucas Stach, Martin Blumenstingl, Neil Armstrong, Philipp Zabel,
	Rob Herring, Russell King

Hi,

This series adds support for the Verisilicon VIPNano-QI NPU in the A311D
as in the VIM3 board.

The IP is very closely based on previous Vivante GPUs, so the etnaviv
kernel driver works basically unchanged.

The userspace part of the driver is being reviewed at:

https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18986

v2: Move reference to RESET_NNA to npu node (Neil)
v3: Fix indentation mistake (Neil)
v4: Add warning when etnaviv probes on a NPU (Lucas)
v5: Reorder HWDB commit to be the last (Lucas)
v6: Add patch to move the power domain to the SoC-specific dtsi (Neil)

Regards,

Tomeu

Tomeu Vizoso (8):
  dt-bindings: reset: meson-g12a: Add missing NNA reset
  dt-bindings: power: Add G12A NNA power domain
  soc: amlogic: meson-pwrc: Add NNA power domain for A311D
  arm64: dts: Add DT node for the VIPNano-QI on the A311D
  drm/etnaviv: Add nn_core_count to chip feature struct
  drm/etnaviv: Warn when probing on NPUs
  drm/etnaviv: add HWDB entry for VIPNano-QI.7120.0055
  arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs

 .../boot/dts/amlogic/meson-g12-common.dtsi    |  9 +++++
 .../amlogic/meson-g12b-a311d-khadas-vim3.dts  |  4 +++
 arch/arm64/boot/dts/amlogic/meson-g12b.dtsi   |  4 +++
 arch/arm64/boot/dts/amlogic/meson-sm1.dtsi    |  4 +++
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c         |  4 +++
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h         |  3 ++
 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c        | 35 +++++++++++++++++++
 drivers/soc/amlogic/meson-ee-pwrc.c           | 17 +++++++++
 include/dt-bindings/power/meson-g12a-power.h  |  1 +
 .../reset/amlogic,meson-g12a-reset.h          |  4 ++-
 10 files changed, 84 insertions(+), 1 deletion(-)

-- 
2.38.1


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^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v6 1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
@ 2022-12-02 11:52 ` Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 2/8] dt-bindings: power: Add G12A NNA power domain Tomeu Vizoso
                   ` (6 subsequent siblings)
  7 siblings, 0 replies; 12+ messages in thread
From: Tomeu Vizoso @ 2022-12-02 11:52 UTC (permalink / raw)
  Cc: italonicola, Tomeu Vizoso, Neil Armstrong, Philipp Zabel,
	Martin Blumenstingl, Rob Herring, Krzysztof Kozlowski,
	Kevin Hilman, Jerome Brunet,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

Doesn't appear in the TRM I have, but it is used by the downstream
galcore driver.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 include/dt-bindings/reset/amlogic,meson-g12a-reset.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
index 6d487c5eba2c..45f6b8a951d0 100644
--- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
+++ b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
@@ -69,7 +69,9 @@
 #define RESET_PARSER_FETCH		72
 #define RESET_CTL			73
 #define RESET_PARSER_TOP		74
-/*					75-77	*/
+/*					75	*/
+#define RESET_NNA			76
+/*					77	*/
 #define RESET_DVALIN			78
 #define RESET_HDMITX			79
 /*					80-95	*/
-- 
2.38.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v6 2/8] dt-bindings: power: Add G12A NNA power domain
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset Tomeu Vizoso
@ 2022-12-02 11:52 ` Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 3/8] soc: amlogic: meson-pwrc: Add NNA power domain for A311D Tomeu Vizoso
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 12+ messages in thread
From: Tomeu Vizoso @ 2022-12-02 11:52 UTC (permalink / raw)
  Cc: italonicola, Tomeu Vizoso, Neil Armstrong, Martin Blumenstingl,
	Rob Herring, Krzysztof Kozlowski, Kevin Hilman, Jerome Brunet,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

Add define for the NNA power domain for the NPU in the G12A.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 include/dt-bindings/power/meson-g12a-power.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
index bb5e67a842de..93b03bdd60b7 100644
--- a/include/dt-bindings/power/meson-g12a-power.h
+++ b/include/dt-bindings/power/meson-g12a-power.h
@@ -9,5 +9,6 @@
 
 #define PWRC_G12A_VPU_ID		0
 #define PWRC_G12A_ETH_ID		1
+#define PWRC_G12A_NNA_ID		2
 
 #endif
-- 
2.38.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v6 3/8] soc: amlogic: meson-pwrc: Add NNA power domain for A311D
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 2/8] dt-bindings: power: Add G12A NNA power domain Tomeu Vizoso
@ 2022-12-02 11:52 ` Tomeu Vizoso
  2022-12-02 11:52 ` [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D Tomeu Vizoso
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 12+ messages in thread
From: Tomeu Vizoso @ 2022-12-02 11:52 UTC (permalink / raw)
  Cc: italonicola, Tomeu Vizoso, Neil Armstrong, Martin Blumenstingl,
	Kevin Hilman, Jerome Brunet,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

Based on power initialization sequence in downstream driver.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/soc/amlogic/meson-ee-pwrc.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c
index dd5f2a13ceb5..f54acffc83f9 100644
--- a/drivers/soc/amlogic/meson-ee-pwrc.c
+++ b/drivers/soc/amlogic/meson-ee-pwrc.c
@@ -46,6 +46,9 @@
 #define HHI_NANOQ_MEM_PD_REG1		(0x47 << 2)
 #define HHI_VPU_MEM_PD_REG2		(0x4d << 2)
 
+#define G12A_HHI_NANOQ_MEM_PD_REG0	(0x43 << 2)
+#define G12A_HHI_NANOQ_MEM_PD_REG1	(0x44 << 2)
+
 struct meson_ee_pwrc;
 struct meson_ee_pwrc_domain;
 
@@ -106,6 +109,13 @@ static struct meson_ee_pwrc_top_domain sm1_pwrc_usb = SM1_EE_PD(17);
 static struct meson_ee_pwrc_top_domain sm1_pwrc_pci = SM1_EE_PD(18);
 static struct meson_ee_pwrc_top_domain sm1_pwrc_ge2d = SM1_EE_PD(19);
 
+static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
+	.sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
+	.sleep_mask = BIT(16) | BIT(17),
+	.iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
+	.iso_mask = BIT(16) | BIT(17),
+};
+
 /* Memory PD Domains */
 
 #define VPU_MEMPD(__reg)					\
@@ -217,6 +227,11 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {
 	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(27, 26) },
 };
 
+static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
+	{ G12A_HHI_NANOQ_MEM_PD_REG0, GENMASK(31, 0) },
+	{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(23, 0) },
+};
+
 #define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks)	\
 	{								\
 		.name = __name,						\
@@ -253,6 +268,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
 	[PWRC_G12A_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,
 				     pwrc_ee_is_powered_off, 11, 2),
 	[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
+	[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
+				    pwrc_ee_is_powered_off),
 };
 
 static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
-- 
2.38.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
                   ` (2 preceding siblings ...)
  2022-12-02 11:52 ` [PATCH v6 3/8] soc: amlogic: meson-pwrc: Add NNA power domain for A311D Tomeu Vizoso
@ 2022-12-02 11:52 ` Tomeu Vizoso
  2023-01-02  9:53   ` Neil Armstrong
  2022-12-02 11:52 ` [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs Tomeu Vizoso
                   ` (3 subsequent siblings)
  7 siblings, 1 reply; 12+ messages in thread
From: Tomeu Vizoso @ 2022-12-02 11:52 UTC (permalink / raw)
  Cc: italonicola, Tomeu Vizoso, Neil Armstrong, Rob Herring,
	Krzysztof Kozlowski, Kevin Hilman, Jerome Brunet,
	Martin Blumenstingl,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
with it with just a few small changes.

v2: Add reference to RESET_NNA (Neil)
v3: Fix indentation (Neil)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi     | 11 +++++++++++
 .../boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts |  4 ++++
 2 files changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 45947c1031c4..61c8461df614 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/power/meson-g12a-power.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -2484,4 +2485,14 @@ xtal: xtal-clk {
 		#clock-cells = <0>;
 	};
 
+	npu: npu@ff100000 {
+		compatible = "vivante,gc";
+		reg = <0x0 0xff100000 0x0 0x20000>;
+		interrupts = <0 147 4>;
+		clocks = <&clkc CLKID_NNA_CORE_CLK>,
+			 <&clkc CLKID_NNA_AXI_CLK>;
+		clock-names = "core", "bus";
+		resets = <&reset RESET_NNA>;
+		power-domains = <&pwrc PWRC_G12A_NNA_ID>;
+	};
 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
index 124a80901084..73f3d87dcefd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
@@ -15,6 +15,10 @@ / {
 	compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
 };
 
+&npu {
+	status = "okay";
+};
+
 /*
  * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
  * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
-- 
2.38.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
                   ` (3 preceding siblings ...)
  2022-12-02 11:52 ` [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D Tomeu Vizoso
@ 2022-12-02 11:52 ` Tomeu Vizoso
  2022-12-05  8:42   ` Neil Armstrong
  2023-01-02 10:30 ` (subset) [PATCH v6 0/8] Support for the NPU in Vim3 Neil Armstrong
                   ` (2 subsequent siblings)
  7 siblings, 1 reply; 12+ messages in thread
From: Tomeu Vizoso @ 2022-12-02 11:52 UTC (permalink / raw)
  Cc: italonicola, Tomeu Vizoso, Rob Herring, Krzysztof Kozlowski,
	Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

The power sequence is different between SoCs in that family, so get the
right bits for each one.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 --
 arch/arm64/boot/dts/amlogic/meson-g12b.dtsi       | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-sm1.dtsi        | 4 ++++
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 61c8461df614..d7eb01509685 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -11,7 +11,6 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
 #include <dt-bindings/thermal/thermal.h>
-#include <dt-bindings/power/meson-g12a-power.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -2493,6 +2492,5 @@ npu: npu@ff100000 {
 			 <&clkc CLKID_NNA_AXI_CLK>;
 		clock-names = "core", "bus";
 		resets = <&reset RESET_NNA>;
-		power-domains = <&pwrc PWRC_G12A_NNA_ID>;
 	};
 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
index ee8fcae9f9f0..886380b5a96f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
@@ -139,3 +139,7 @@ map1 {
 &mali {
 	dma-coherent;
 };
+
+&npu {
+	power-domains = <&pwrc PWRC_G12A_NNA_ID>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
index 80737731af3f..318a16aa4433 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
@@ -543,3 +543,7 @@ &vpu {
 &usb {
 	power-domains = <&pwrc PWRC_SM1_USB_ID>;
 };
+
+&npu {
+	power-domains = <&pwrc PWRC_SM1_NNA_ID>;
+};
-- 
2.38.1


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* Re: [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs
  2022-12-02 11:52 ` [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs Tomeu Vizoso
@ 2022-12-05  8:42   ` Neil Armstrong
  0 siblings, 0 replies; 12+ messages in thread
From: Neil Armstrong @ 2022-12-05  8:42 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: italonicola, Rob Herring, Krzysztof Kozlowski, Kevin Hilman,
	Jerome Brunet, Martin Blumenstingl,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

On 02/12/2022 12:52, Tomeu Vizoso wrote:
> The power sequence is different between SoCs in that family, so get the
> right bits for each one.
> 
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> ---
>   arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 --
>   arch/arm64/boot/dts/amlogic/meson-g12b.dtsi       | 4 ++++
>   arch/arm64/boot/dts/amlogic/meson-sm1.dtsi        | 4 ++++
>   3 files changed, 8 insertions(+), 2 deletions(-)


Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>


I'll probably squash it in patch 4.

thanks,
Neil

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D
  2022-12-02 11:52 ` [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D Tomeu Vizoso
@ 2023-01-02  9:53   ` Neil Armstrong
  2023-01-02 10:17     ` Tomeu Vizoso
  0 siblings, 1 reply; 12+ messages in thread
From: Neil Armstrong @ 2023-01-02  9:53 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: italonicola, Rob Herring, Krzysztof Kozlowski, Kevin Hilman,
	Jerome Brunet, Martin Blumenstingl,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

On 02/12/2022 12:52, Tomeu Vizoso wrote:
> This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
> with it with just a few small changes.
> 
> v2: Add reference to RESET_NNA (Neil)
> v3: Fix indentation (Neil)
> 
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>   arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi     | 11 +++++++++++
>   .../boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts |  4 ++++
>   2 files changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> index 45947c1031c4..61c8461df614 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> @@ -11,6 +11,7 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
>   #include <dt-bindings/thermal/thermal.h>
> +#include <dt-bindings/power/meson-g12a-power.h>
>   
>   / {
>   	interrupt-parent = <&gic>;
> @@ -2484,4 +2485,14 @@ xtal: xtal-clk {
>   		#clock-cells = <0>;
>   	};
>   
> +	npu: npu@ff100000 {
> +		compatible = "vivante,gc";
> +		reg = <0x0 0xff100000 0x0 0x20000>;
> +		interrupts = <0 147 4>;
> +		clocks = <&clkc CLKID_NNA_CORE_CLK>,
> +			 <&clkc CLKID_NNA_AXI_CLK>;
> +		clock-names = "core", "bus";
> +		resets = <&reset RESET_NNA>;
> +		power-domains = <&pwrc PWRC_G12A_NNA_ID>;

A status = "disable" is missing here.

> +	};
>   };
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
> index 124a80901084..73f3d87dcefd 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
> @@ -15,6 +15,10 @@ / {
>   	compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
>   };
>   
> +&npu {
> +	status = "okay";

Tomeu, I think until the user-space stack is clean this should be removed
and left disabled.

I can fix this while applying if you want,

Neil

> +};
> +
>   /*
>    * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
>    * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between


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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D
  2023-01-02  9:53   ` Neil Armstrong
@ 2023-01-02 10:17     ` Tomeu Vizoso
  0 siblings, 0 replies; 12+ messages in thread
From: Tomeu Vizoso @ 2023-01-02 10:17 UTC (permalink / raw)
  To: neil.armstrong
  Cc: italonicola, Rob Herring, Krzysztof Kozlowski, Kevin Hilman,
	Jerome Brunet, Martin Blumenstingl,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:ARM/Amlogic Meson SoC support, open list

On 1/2/23 10:53, Neil Armstrong wrote:
> On 02/12/2022 12:52, Tomeu Vizoso wrote:
>> This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
>> with it with just a few small changes.
>>
>> v2: Add reference to RESET_NNA (Neil)
>> v3: Fix indentation (Neil)
>>
>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi     | 11 +++++++++++
>>   .../boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts |  4 ++++
>>   2 files changed, 15 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi 
>> b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> index 45947c1031c4..61c8461df614 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> @@ -11,6 +11,7 @@
>>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>>   #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
>>   #include <dt-bindings/thermal/thermal.h>
>> +#include <dt-bindings/power/meson-g12a-power.h>
>>   / {
>>       interrupt-parent = <&gic>;
>> @@ -2484,4 +2485,14 @@ xtal: xtal-clk {
>>           #clock-cells = <0>;
>>       };
>> +    npu: npu@ff100000 {
>> +        compatible = "vivante,gc";
>> +        reg = <0x0 0xff100000 0x0 0x20000>;
>> +        interrupts = <0 147 4>;
>> +        clocks = <&clkc CLKID_NNA_CORE_CLK>,
>> +             <&clkc CLKID_NNA_AXI_CLK>;
>> +        clock-names = "core", "bus";
>> +        resets = <&reset RESET_NNA>;
>> +        power-domains = <&pwrc PWRC_G12A_NNA_ID>;
> 
> A status = "disable" is missing here.
> 
>> +    };
>>   };
>> diff --git 
>> a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts 
>> b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
>> index 124a80901084..73f3d87dcefd 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
>> @@ -15,6 +15,10 @@ / {
>>       compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
>>   };
>> +&npu {
>> +    status = "okay";
> 
> Tomeu, I think until the user-space stack is clean this should be removed
> and left disabled.

Sounds good to me, we can easily carry a patch in Mesa CI in the meantime.

> I can fix this while applying if you want,

I would appreciate it, thanks!

Tomeu

> Neil
> 
>> +};
>> +
>>   /*
>>    * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
>>    * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
> 

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linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: (subset) [PATCH v6 0/8] Support for the NPU in Vim3
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
                   ` (4 preceding siblings ...)
  2022-12-02 11:52 ` [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs Tomeu Vizoso
@ 2023-01-02 10:30 ` Neil Armstrong
  2023-01-02 10:33 ` Neil Armstrong
  2023-01-02 10:39 ` Neil Armstrong
  7 siblings, 0 replies; 12+ messages in thread
From: Neil Armstrong @ 2023-01-02 10:30 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: moderated list:DRM DRIVERS FOR VIVANTE GPU IP, David Airlie,
	Kevin Hilman, open list:ARM/Amlogic Meson SoC support,
	italonicola,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	open list:DRM DRIVERS FOR VIVANTE GPU IP,
	moderated list:ARM/Amlogic Meson SoC support, Rob Herring,
	Martin Blumenstingl, Philipp Zabel, Daniel Vetter, Russell King,
	Jerome Brunet, open list, Lucas Stach, Christian Gmeiner,
	Krzysztof Kozlowski

Hi,

On Fri, 2 Dec 2022 12:52:12 +0100, Tomeu Vizoso wrote:
> This series adds support for the Verisilicon VIPNano-QI NPU in the A311D
> as in the VIM3 board.
> 
> The IP is very closely based on previous Vivante GPUs, so the etnaviv
> kernel driver works basically unchanged.
> 
> The userspace part of the driver is being reviewed at:
> 
> [...]

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.3/bindings)

[1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset
      https://git.kernel.org/amlogic/c/a439267609f9d57b15991c55550956d7cc5404d8
[2/8] dt-bindings: power: Add G12A NNA power domain
      https://git.kernel.org/amlogic/c/340ea839b4306335bd627fe0dd6789df803aef58

These changes has been applied on the intermediate git tree [1].

The v6.3/bindings branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: (subset) [PATCH v6 0/8] Support for the NPU in Vim3
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
                   ` (5 preceding siblings ...)
  2023-01-02 10:30 ` (subset) [PATCH v6 0/8] Support for the NPU in Vim3 Neil Armstrong
@ 2023-01-02 10:33 ` Neil Armstrong
  2023-01-02 10:39 ` Neil Armstrong
  7 siblings, 0 replies; 12+ messages in thread
From: Neil Armstrong @ 2023-01-02 10:33 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: Martin Blumenstingl, Kevin Hilman, Russell King, Daniel Vetter,
	David Airlie, open list:DRM DRIVERS FOR VIVANTE GPU IP, open list,
	italonicola, Lucas Stach, Philipp Zabel, Jerome Brunet,
	open list:ARM/Amlogic Meson SoC support,
	moderated list:DRM DRIVERS FOR VIVANTE GPU IP,
	Krzysztof Kozlowski,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/Amlogic Meson SoC support, Rob Herring,
	Christian Gmeiner

Hi,

On Fri, 2 Dec 2022 12:52:12 +0100, Tomeu Vizoso wrote:
> This series adds support for the Verisilicon VIPNano-QI NPU in the A311D
> as in the VIM3 board.
> 
> The IP is very closely based on previous Vivante GPUs, so the etnaviv
> kernel driver works basically unchanged.
> 
> The userspace part of the driver is being reviewed at:
> 
> [...]

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.3/drivers)

[3/8] soc: amlogic: meson-pwrc: Add NNA power domain for A311D
      https://git.kernel.org/amlogic/c/9a217b7e895313a4d42f7a6c48b6237a595945f4

These changes has been applied on the intermediate git tree [1].

The v6.3/drivers branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: (subset) [PATCH v6 0/8] Support for the NPU in Vim3
  2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
                   ` (6 preceding siblings ...)
  2023-01-02 10:33 ` Neil Armstrong
@ 2023-01-02 10:39 ` Neil Armstrong
  7 siblings, 0 replies; 12+ messages in thread
From: Neil Armstrong @ 2023-01-02 10:39 UTC (permalink / raw)
  To: Tomeu Vizoso
  Cc: Philipp Zabel, Rob Herring, open list, Jerome Brunet,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:DRM DRIVERS FOR VIVANTE GPU IP, Kevin Hilman,
	moderated list:ARM/Amlogic Meson SoC support,
	open list:DRM DRIVERS FOR VIVANTE GPU IP, Krzysztof Kozlowski,
	open list:ARM/Amlogic Meson SoC support, italonicola,
	Martin Blumenstingl, David Airlie, Lucas Stach, Daniel Vetter,
	Christian Gmeiner, Russell King

Hi,

On Fri, 2 Dec 2022 12:52:12 +0100, Tomeu Vizoso wrote:
> This series adds support for the Verisilicon VIPNano-QI NPU in the A311D
> as in the VIM3 board.
> 
> The IP is very closely based on previous Vivante GPUs, so the etnaviv
> kernel driver works basically unchanged.
> 
> The userspace part of the driver is being reviewed at:
> 
> [...]

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.3/arm64-dt)

[4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D
      https://git.kernel.org/amlogic/c/18b542e544d3bd00e55d7135ee673b34dbfdb9b9
[8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs
      (no commit info)

These changes has been applied on the intermediate git tree [1].

The v6.3/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2023-01-02 10:40 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-12-02 11:52 [PATCH v6 0/8] Support for the NPU in Vim3 Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 1/8] dt-bindings: reset: meson-g12a: Add missing NNA reset Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 2/8] dt-bindings: power: Add G12A NNA power domain Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 3/8] soc: amlogic: meson-pwrc: Add NNA power domain for A311D Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D Tomeu Vizoso
2023-01-02  9:53   ` Neil Armstrong
2023-01-02 10:17     ` Tomeu Vizoso
2022-12-02 11:52 ` [PATCH v6 8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs Tomeu Vizoso
2022-12-05  8:42   ` Neil Armstrong
2023-01-02 10:30 ` (subset) [PATCH v6 0/8] Support for the NPU in Vim3 Neil Armstrong
2023-01-02 10:33 ` Neil Armstrong
2023-01-02 10:39 ` Neil Armstrong

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