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From: Boqun Feng <boqun.feng@gmail.com>
To: FUJITA Tomonori <fujita.tomonori@gmail.com>
Cc: gary@garyguo.net, ojeda@kernel.org, a.hindborg@kernel.org,
	aliceryhl@google.com, bjorn3_gh@protonmail.com, dakr@kernel.org,
	lossin@kernel.org, tmgross@umich.edu, acourbot@nvidia.com,
	rust-for-linux@vger.kernel.org, linux-arch@vger.kernel.org
Subject: Re: [PATCH v2 0/4] rust: Add i8/i16 atomic xchg helpers
Date: Tue, 30 Dec 2025 09:14:19 +0800	[thread overview]
Message-ID: <aVMna3OX5gIZJKCV@tardis-2.local> (raw)
In-Reply-To: <20251227.181717.1843883205283099818.fujita.tomonori@gmail.com>

On Sat, Dec 27, 2025 at 06:17:17PM +0900, FUJITA Tomonori wrote:
> On Sat, 27 Dec 2025 15:23:30 +0800
> Boqun Feng <boqun.feng@gmail.com> wrote:
> 
> > On Thu, Dec 25, 2025 at 09:56:55AM +0900, FUJITA Tomonori wrote:
> > [...]
> >> >> The architectures supporting Rust, implement atomic xchg families
> >> >> using architecture-specific instructions. They work for i8/i16 too so
> >> >> the helpers just call them.
> >> >> 
> >> >> Tested on QEMU (86_64, arm64, riscv, loongarch, and armv7).
> >> >> 
> >> >> Note the architectures that support Rust handle xchg differently:
> >> >> 
> >> >> - arm64 and riscv support xchg with all the orderings.
> >> >> 
> >> >> - x86_64 and loongarch support only full-ordering xchg. They calls the
> >> >>   full-ordering xchg for any orderings.
> >> > 
> >> > Maybe it's just that I'm reading this differently, but I think this is a
> >> > bit confusing, as if there's an optimisation opportunity.
> >> > 
> >> > x86 is TSO, so even a relaxed xchg is a full xchg. So in this sense x86
> >> > has implemented all orderings.
> >> 
> >> For x86_64, I agree that the wording is confusing. xchg always implies
> >> lock so different memory orderings all map to the same full-ordered
> >> xchg there.
> >> 
> > 
> > I feel a bit confusing as well about the need of mentioning the exact
> > ordering of these primitives on each arch. In my opinion, as long as
> > rust_helper_xchg_X() is mapped to xchg_X() in C, then it's clear that
> > they have the ordering of the corresponding C APIs. But I keep it as it
> > is for now, I may remove them from the commit logs later after I
> > re-think about this.
> 
> Given the current implementation, I agree that the ordering
> explanation is redundant.
> 
> When I started working on this, I initially thought we would need
> architecture-specific ifdefs to select the appropriate implementation
> for each ordering, rather than having a straightforward per-ordering
> mapping like this. That's why I added the explanation about how xchg
> is handled on each architecture.
> 

I will remove those ordering explanation and I will also apply other
changes to the xchg/cmpxchg helpers: we should use xchg() and
try_cmpxchg() instead of raw_xchg() and raw_try_cmpxchg() because we
want to keep the KCSan instrumentation for those helpers.

Regards,
Boqun

> 
> > Thank you all! Applied in rust-sync:
> > 
> > 	https://git.kernel.org/pub/scm/linux/kernel/git/boqun/linux.git/ rust-sync
> 
> Thanks a lot!
> 

  reply	other threads:[~2025-12-30  1:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-23  6:21 [PATCH v2 0/4] rust: Add i8/i16 atomic xchg helpers FUJITA Tomonori
2025-12-23  6:21 ` [PATCH v2 1/4] rust: helpers: " FUJITA Tomonori
2025-12-23  6:21 ` [PATCH v2 2/4] rust: helpers: Add i8/i16 atomic xchg_acquire helpers FUJITA Tomonori
2025-12-23  6:21 ` [PATCH v2 3/4] rust: helpers: Add i8/i16 atomic xchg_release helpers FUJITA Tomonori
2025-12-23  6:21 ` [PATCH v2 4/4] rust: helpers: Add i8/i16 atomic xchg_relaxed helpers FUJITA Tomonori
2025-12-23 12:46 ` [PATCH v2 0/4] rust: Add i8/i16 atomic xchg helpers Gary Guo
2025-12-25  0:56   ` FUJITA Tomonori
2025-12-27  7:23     ` Boqun Feng
2025-12-27  9:17       ` FUJITA Tomonori
2025-12-30  1:14         ` Boqun Feng [this message]
2025-12-30  1:42           ` FUJITA Tomonori

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