From: gores@marvell.com (Siddarth Gore)
To: linux-arm-kernel@lists.infradead.org
Subject: L2 cache support for pxa16x
Date: Wed, 12 May 2010 15:26:21 +0530 [thread overview]
Message-ID: <1273658181.6926.27.camel@pe-dt434> (raw)
Hi Eric/Haojian,
Can the Tauros2 support be used for pxa168 as well? The one difference I
can see is that L2 Enable is in control register instead of extra
feature register. But rest of the things look very similar to me.
-siddarth
next reply other threads:[~2010-05-12 9:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-12 9:56 Siddarth Gore [this message]
2010-05-12 10:11 ` L2 cache support for pxa16x Eric Miao
2010-05-20 10:17 ` Siddarth Gore
2010-05-20 14:06 ` Eric Miao
2010-05-21 9:44 ` Siddarth Gore
2010-05-21 10:27 ` Eric Miao
2010-05-21 10:37 ` Siddarth Gore
2010-05-21 11:07 ` Haojian Zhuang
2010-05-21 11:30 ` Eric Miao
2010-05-21 11:05 ` Haojian Zhuang
2010-05-21 11:37 ` Eric Miao
2010-06-11 10:20 ` Siddarth Gore
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