From: Bhavya Kapoor <b-kapoor@ti.com>
To: Neha Malcom Francis <n-francis@ti.com>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>, <conor+dt@kernel.org>,
<krzk+dt@kernel.org>, <robh@kernel.org>, <kristo@kernel.org>,
<m-chawdhry@ti.com>, <vigneshr@ti.com>, <nm@ti.com>,
<sinthu.raja@ti.com>
Subject: Re: [PATCH] arm64: dts: ti: k3-am68-sk-base-board: Add clklb pin mux for mmc1
Date: Thu, 8 Aug 2024 13:08:41 +0530 [thread overview]
Message-ID: <1319a6ac-6784-45d6-8a0e-170e40d3aa18@ti.com> (raw)
In-Reply-To: <8fa39624-9a92-404d-8651-9ade5700a7d3@ti.com>
Hi Neha,
On 08/08/24 11:51 am, Neha Malcom Francis wrote:
> Hi Bhavya
>
> On 07/08/24 15:46, Bhavya Kapoor wrote:
>> mmc1 was not functional since pin mux for clklb was not present.
>> Thus, add clklb pin mux to get MMC working.
>>
>> Fixes: a266c180b398 ("arm64: dts: ti: k3-am68-sk: Add support for
>> AM68 SK base board")
>> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
>> ---
>>
>> rebased to next-20240807
>>
>> arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
>> b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
>> index 90dbe31c5b81..d5ceab79536c 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
>> @@ -204,6 +204,7 @@ main_mmc1_pins_default: main-mmc1-default-pins {
>> pinctrl-single,pins = <
>> J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
>> J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
>> + J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
>> J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
>> J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
>> J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
>
> How is this different from the P23 pinmux for MMC1_CLK? Could you
> explain what CLKLB is, since it doesn't have a ball number I'm finding
> it difficult to understand what it is?
>
This pin needs to be setup so that MMC_CLK is looped back at pad level
for highspeed SDIO operations (has been same across K3 family). MMC0/1
has this pin configured as INPUT by reset default as these have boot media
These pinmuxes are derived from pinmux file shared by EVM team during
wakeup/board bringup.
Regards
next prev parent reply other threads:[~2024-08-08 7:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-07 10:16 [PATCH] arm64: dts: ti: k3-am68-sk-base-board: Add clklb pin mux for mmc1 Bhavya Kapoor
2024-08-08 5:09 ` Manorit Chawdhry
2024-08-08 6:21 ` Neha Malcom Francis
2024-08-08 7:38 ` Bhavya Kapoor [this message]
2024-08-08 7:49 ` Neha Malcom Francis
2024-08-08 8:29 ` Manorit Chawdhry
2024-08-08 10:53 ` Nishanth Menon
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