[PATCH REBASE 0/6] i2c: omap: misc changes

[PATCH REBASE 0/6] i2c: omap: misc changes

[Felipe Balbi]

Hi,

this is just a rebase of the previous series adding support
for amount of bytes transferred upon NACK.

Well, actually the patches implementing transferred bytes
reporting aren't here because we need to discuss how to move
forward.

This series is just a preparation for that, but it also
contains a at least one bugfix.

Each and every patch has been tested with pandaboard, it
would be nice to get Tested-bys from other folks on other
platforms before pushing this for v3.9 (there's more than
enough time for that).

Note that we're also dropping b_hw flag since that becomes
useless since we'll never set STT and STP together anymore.

Give it a good round of test, please.

Felipe Balbi (6):
  i2c: omap: no need to access platform_device
  i2c: omap: also complete() when stat becomes zero
  i2c: omap: improve 'rev' a little bit
  i2c: omap: in case of VERSION_2 read IRQSTATUS_RAW but write to
    IRQSTATUS
  i2c: omap: wait for transfer completion before sending STP bit
  i2c: omap: get rid of b_hw flag

 drivers/i2c/busses/i2c-omap.c | 184 +++++++++++++++++++++---------------------
 1 file changed, 93 insertions(+), 91 deletions(-)

-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 1/6] i2c: omap: no need to access platform_device

[Felipe Balbi]

PM callbacks pass our device pointer as argument
and we don't need to access the platform_device
just to dereference that down to dev->drvdata.

instead, just use dev_get_drvdata() directly.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/i2c/busses/i2c-omap.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 7a62acb..9a9cf7c 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1289,8 +1289,7 @@ static int __devexit omap_i2c_remove(struct platform_device *pdev)
 #ifdef CONFIG_PM_RUNTIME
 static int omap_i2c_runtime_suspend(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct omap_i2c_dev *_dev = platform_get_drvdata(pdev);
+	struct omap_i2c_dev *_dev = dev_get_drvdata(dev);
 
 	_dev->iestate = omap_i2c_read_reg(_dev, OMAP_I2C_IE_REG);
 
@@ -1310,8 +1309,7 @@ static int omap_i2c_runtime_suspend(struct device *dev)
 
 static int omap_i2c_runtime_resume(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct omap_i2c_dev *_dev = platform_get_drvdata(pdev);
+	struct omap_i2c_dev *_dev = dev_get_drvdata(dev);
 
 	if (!_dev->regs)
 		return 0;
-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 2/6] i2c: omap: also complete() when stat becomes zero

[Felipe Balbi]

In case we loop on IRQ handler until stat is
finally zero, we would end up in a situation
where all I2C transfers would misteriously
timeout because we were not calling complete()
in that situation.

Fix the issue by moving omap_i2c_complete_cmd()
call inside the 'out' label.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/i2c/busses/i2c-omap.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 9a9cf7c..fcecb0b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1022,9 +1022,8 @@ omap_i2c_isr_thread(int this_irq, void *dev_id)
 		}
 	} while (stat);
 
-	omap_i2c_complete_cmd(dev, err);
-
 out:
+	omap_i2c_complete_cmd(dev, err);
 	spin_unlock_irqrestore(&dev->lock, flags);
 
 	return IRQ_HANDLED;
-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 3/6] i2c: omap: improve 'rev' a little bit

[Felipe Balbi]

a later patch will use scheme detection at
another part of the code, but current scheme
detection implementation relies on the fact that
we still hold scheme on the first 16 bits of our
rev variable, which won't be true as soon as
we move away from probe() because we left shift
it by 16 in case of newer IP versions in order
to fit other revision data in the lower 16 bits.

To fix that, we are changing scheme implementation
to assume scheme is always placed on the top 16
bits.

While at that, also move those macro definitions
to the top of the source file, where they should've
been to start with, because a later patch will use
them.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/i2c/busses/i2c-omap.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index fcecb0b..c93eb17 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -60,6 +60,17 @@
 /* timeout for pm runtime autosuspend */
 #define OMAP_I2C_PM_TIMEOUT		1000	/* ms */
 
+#define OMAP_I2C_SCHEME(rev)		((rev & 0xc0000000) >> 30)
+
+#define OMAP_I2C_SCHEME_0		0
+#define OMAP_I2C_SCHEME_1		1
+
+#define OMAP_I2C_REV_SCHEME_0_MAJOR(rev) (rev >> 4)
+#define OMAP_I2C_REV_SCHEME_0_MINOR(rev) (rev & 0xf)
+
+#define OMAP_I2C_REV_SCHEME_1_MAJOR(rev) ((rev & 0x0700) >> 7)
+#define OMAP_I2C_REV_SCHEME_1_MINOR(rev) (rev & 0x1f)
+
 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
 enum {
 	OMAP_I2C_REV_REG = 0,
@@ -1058,16 +1069,6 @@ static const struct of_device_id omap_i2c_of_match[] = {
 MODULE_DEVICE_TABLE(of, omap_i2c_of_match);
 #endif
 
-#define OMAP_I2C_SCHEME(rev)		((rev & 0xc000) >> 14)
-
-#define OMAP_I2C_REV_SCHEME_0_MAJOR(rev) (rev >> 4)
-#define OMAP_I2C_REV_SCHEME_0_MINOR(rev) (rev & 0xf)
-
-#define OMAP_I2C_REV_SCHEME_1_MAJOR(rev) ((rev & 0x0700) >> 7)
-#define OMAP_I2C_REV_SCHEME_1_MINOR(rev) (rev & 0x1f)
-#define OMAP_I2C_SCHEME_0		0
-#define OMAP_I2C_SCHEME_1		1
-
 static int __devinit
 omap_i2c_probe(struct platform_device *pdev)
 {
@@ -1158,7 +1159,7 @@ omap_i2c_probe(struct platform_device *pdev)
 	 * Also since the omap_i2c_read_reg uses reg_map_ip_* a
 	 * raw_readw is done.
 	 */
-	rev = __raw_readw(dev->base + 0x04);
+	rev = __raw_readw(dev->base + 0x04) << 16;
 
 	scheme = OMAP_I2C_SCHEME(rev);
 	switch (scheme) {
@@ -1172,8 +1173,7 @@ omap_i2c_probe(struct platform_device *pdev)
 		/* FALLTHROUGH */
 	default:
 		dev->regs = (u8 *)reg_map_ip_v2;
-		rev = (rev << 16) |
-			omap_i2c_read_reg(dev, OMAP_I2C_IP_V2_REVNB_LO);
+		rev |= omap_i2c_read_reg(dev, OMAP_I2C_IP_V2_REVNB_LO);
 		minor = OMAP_I2C_REV_SCHEME_1_MINOR(rev);
 		major = OMAP_I2C_REV_SCHEME_1_MAJOR(rev);
 		dev->rev = rev;
-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 4/6] i2c: omap: in case of VERSION_2 read IRQSTATUS_RAW but write to IRQSTATUS

[Felipe Balbi]

on OMAP4+ we want to read IRQSTATUS_RAW register,
instead of IRQSTATUS. The reason being that IRQSTATUS
will only contain the bits which were enabled on
IRQENABLE_SET and that will break when we need to
poll for a certain bit which wasn't enabled as an
IRQ source.

One such case is after we finish converting to
deferred stop bit, we will have to poll for ARDY
bit before returning control for the client driver
in order to prevent us from trying to start a
transfer on a bus which is already busy.

Note, however, that i2c-omap.c needs a big rework
on register definition and register access. Such
work will be done in a separate series of patches.

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/i2c/busses/i2c-omap.c | 50 +++++++++++++++++++++++++++++++++----------
 1 file changed, 39 insertions(+), 11 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index c93eb17..039edc2 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -288,6 +288,36 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
 				(i2c_dev->regs[reg] << i2c_dev->reg_shift));
 }
 
+static inline void omap_i2c_write_irqstatus(struct omap_i2c_dev *i2c_dev,
+		u16 val)
+{
+	omap_i2c_write_reg(i2c_dev, OMAP_I2C_STAT_REG, val);
+}
+
+static inline u16 omap_i2c_read_irqstatus(struct omap_i2c_dev *i2c_dev)
+{
+	u16 scheme;
+
+	/*
+	 * if we are OMAP_I2C_IP_VERSION_2, we need to read from
+	 * IRQSTATUS_RAW, but write to IRQSTATUS
+	 */
+	scheme = OMAP_I2C_SCHEME(i2c_dev->rev);
+	switch (scheme) {
+	case OMAP_I2C_SCHEME_0:
+		return __raw_readw(i2c_dev->base +
+				(i2c_dev->regs[OMAP_I2C_STAT_REG] <<
+				 i2c_dev->reg_shift));
+		break;
+	case OMAP_I2C_SCHEME_1:
+		/* FALLTHROUGH */
+	default:
+		return __raw_readw(i2c_dev->base +
+				((i2c_dev->regs[OMAP_I2C_STAT_REG] - 0x04)
+				 << i2c_dev->reg_shift));
+	}
+}
+
 static void __omap_i2c_init(struct omap_i2c_dev *dev)
 {
 
@@ -470,7 +500,7 @@ static int omap_i2c_wait_for_bb(struct omap_i2c_dev *dev)
 	unsigned long timeout;
 
 	timeout = jiffies + OMAP_I2C_TIMEOUT;
-	while (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG) & OMAP_I2C_STAT_BB) {
+	while (omap_i2c_read_irqstatus(dev) & OMAP_I2C_STAT_BB) {
 		if (time_after(jiffies, timeout)) {
 			dev_warn(dev->dev, "timeout waiting for bus ready\n");
 			return -ETIMEDOUT;
@@ -696,7 +726,7 @@ omap_i2c_complete_cmd(struct omap_i2c_dev *dev, u16 err)
 static inline void
 omap_i2c_ack_stat(struct omap_i2c_dev *dev, u16 stat)
 {
-	omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat);
+	omap_i2c_write_irqstatus(dev, stat);
 }
 
 static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat)
@@ -713,12 +743,10 @@ static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat)
 		omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR);
 
 		/* Step 2: */
-		if (!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
-						& OMAP_I2C_STAT_BB)) {
+		if (!(omap_i2c_read_irqstatus(dev) & OMAP_I2C_STAT_BB)) {
 
 			/* Step 3: */
-			if (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
-						& OMAP_I2C_STAT_RDR) {
+			if (omap_i2c_read_irqstatus(dev) & OMAP_I2C_STAT_RDR) {
 				omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR);
 				dev_dbg(dev->dev, "RDR when bus is busy.\n");
 			}
@@ -799,7 +827,7 @@ static int errata_omap3_i462(struct omap_i2c_dev *dev)
 	u16 stat;
 
 	do {
-		stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+		stat = omap_i2c_read_irqstatus(dev);
 		if (stat & OMAP_I2C_STAT_XUDF)
 			break;
 
@@ -894,7 +922,7 @@ omap_i2c_isr(int irq, void *dev_id)
 
 	spin_lock(&dev->lock);
 	mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
-	stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+	stat = omap_i2c_read_irqstatus(dev);
 
 	if (stat & mask)
 		ret = IRQ_WAKE_THREAD;
@@ -916,7 +944,7 @@ omap_i2c_isr_thread(int this_irq, void *dev_id)
 	spin_lock_irqsave(&dev->lock, flags);
 	do {
 		bits = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
-		stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
+		stat = omap_i2c_read_irqstatus(dev);
 		stat &= bits;
 
 		/* If we're in receiver mode, ignore XDR/XRDY */
@@ -1297,10 +1325,10 @@ static int omap_i2c_runtime_suspend(struct device *dev)
 	if (_dev->rev < OMAP_I2C_OMAP1_REV_2) {
 		omap_i2c_read_reg(_dev, OMAP_I2C_IV_REG); /* Read clears */
 	} else {
-		omap_i2c_write_reg(_dev, OMAP_I2C_STAT_REG, _dev->iestate);
+		omap_i2c_write_irqstatus(_dev, _dev->iestate);
 
 		/* Flush posted write */
-		omap_i2c_read_reg(_dev, OMAP_I2C_STAT_REG);
+		omap_i2c_read_irqstatus(_dev);
 	}
 
 	return 0;
-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 5/6] i2c: omap: wait for transfer completion before sending STP bit

[Felipe Balbi]

Later patches will come adding support for
reporting amount of bytes transferred so that
client drivers can count how many bytes are
left to transfer.

This is useful mostly in case of NACKs when
client driver wants to know exactly which
byte got NACKed so it doesn't have to resend
all bytes again.

In order to make that work with OMAP's I2C
controller, we need to prevent sending STP
bit until message is transferred. The reason
behind that is because OMAP_I2C_CNT_REG gets
reset to original value after STP bit is
shifted through I2C_SDA line and that would
prevent us from reading the correct number of
bytes left to transfer.

The full programming model suggested by IP
owner was the following:

- start I2C transfer (without STP bit)
- upon completion or NACK, read I2C_CNT register
- write STP bit to I2C_CON register
- wait for ARDY bit

With this patch we're implementing all steps
except step #2 which will come in a later
patch series. In order to implement full NACK
reporting we need to add a new field to struct
i2c_msg, but that's still under discussion on
what's the best way to do it. For now, we can
prepare the driver to receive that piece of code.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/i2c/busses/i2c-omap.c | 92 ++++++++++++++++++-------------------------
 1 file changed, 38 insertions(+), 54 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 039edc2..4d90f08 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -479,9 +479,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
 	}
 
 	dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
-			OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
-			OMAP_I2C_IE_AL)  | ((dev->fifo_size) ?
-				(OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0);
+			OMAP_I2C_IE_NACK | OMAP_I2C_IE_AL)  |
+			((dev->fifo_size) ? (OMAP_I2C_IE_RDR |
+				OMAP_I2C_IE_XDR) : 0);
 
 	dev->pscstate = psc;
 	dev->scllstate = scll;
@@ -511,6 +511,22 @@ static int omap_i2c_wait_for_bb(struct omap_i2c_dev *dev)
 	return 0;
 }
 
+static int omap_i2c_wait_for_ardy(struct omap_i2c_dev *dev)
+{
+	unsigned long timeout;
+
+	timeout = jiffies + OMAP_I2C_TIMEOUT;
+	while (!(omap_i2c_read_irqstatus(dev) & OMAP_I2C_STAT_ARDY)) {
+		if (time_after(jiffies, timeout)) {
+			dev_warn(dev->dev, "timeout waiting for access ready\n");
+			return -ETIMEDOUT;
+		}
+		usleep_range(800, 1200);
+	}
+
+	return 0;
+}
+
 static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)
 {
 	u16		buf;
@@ -558,6 +574,7 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
 {
 	struct omap_i2c_dev *dev = i2c_get_adapdata(adap);
 	unsigned long timeout;
+	int ret = 0;
 	u16 w;
 
 	dev_dbg(dev->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
@@ -601,35 +618,9 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
 	if (!(msg->flags & I2C_M_RD))
 		w |= OMAP_I2C_CON_TRX;
 
-	if (!dev->b_hw && stop)
-		w |= OMAP_I2C_CON_STP;
-
 	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w);
 
 	/*
-	 * Don't write stt and stp together on some hardware.
-	 */
-	if (dev->b_hw && stop) {
-		unsigned long delay = jiffies + OMAP_I2C_TIMEOUT;
-		u16 con = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG);
-		while (con & OMAP_I2C_CON_STT) {
-			con = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG);
-
-			/* Let the user know if i2c is in a bad state */
-			if (time_after(jiffies, delay)) {
-				dev_err(dev->dev, "controller timed out "
-				"waiting for start condition to finish\n");
-				return -ETIMEDOUT;
-			}
-			cpu_relax();
-		}
-
-		w |= OMAP_I2C_CON_STP;
-		w &= ~OMAP_I2C_CON_STT;
-		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w);
-	}
-
-	/*
 	 * REVISIT: We should abort the transfer on signals, but the bus goes
 	 * into arbitration and we're currently unable to recover from it.
 	 */
@@ -639,31 +630,37 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
 		dev_err(dev->dev, "controller timed out\n");
 		omap_i2c_reset(dev);
 		__omap_i2c_init(dev);
-		return -ETIMEDOUT;
+		ret = -ETIMEDOUT;
+		goto out;
 	}
 
-	if (likely(!dev->cmd_err))
-		return 0;
-
 	/* We have an error */
 	if (dev->cmd_err & (OMAP_I2C_STAT_AL | OMAP_I2C_STAT_ROVR |
 			    OMAP_I2C_STAT_XUDF)) {
 		omap_i2c_reset(dev);
 		__omap_i2c_init(dev);
-		return -EIO;
+		ret = -EIO;
+		goto out;
 	}
 
 	if (dev->cmd_err & OMAP_I2C_STAT_NACK) {
 		if (msg->flags & I2C_M_IGNORE_NAK)
 			return 0;
-		if (stop) {
-			w = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG);
-			w |= OMAP_I2C_CON_STP;
-			omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w);
-		}
-		return -EREMOTEIO;
+
+		ret = -EREMOTEIO;
+	}
+
+out:
+
+	if (stop) {
+		w = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG);
+		w |= OMAP_I2C_CON_STP;
+		omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w);
+
+		ret = omap_i2c_wait_for_ardy(dev);
 	}
-	return -EIO;
+
+	return ret;
 }
 
 
@@ -977,19 +974,6 @@ omap_i2c_isr_thread(int this_irq, void *dev_id)
 			break;
 		}
 
-		/*
-		 * ProDB0017052: Clear ARDY bit twice
-		 */
-		if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
-					OMAP_I2C_STAT_AL)) {
-			omap_i2c_ack_stat(dev, (OMAP_I2C_STAT_RRDY |
-						OMAP_I2C_STAT_RDR |
-						OMAP_I2C_STAT_XRDY |
-						OMAP_I2C_STAT_XDR |
-						OMAP_I2C_STAT_ARDY));
-			break;
-		}
-
 		if (stat & OMAP_I2C_STAT_RDR) {
 			u8 num_bytes = 1;
 
-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 6/6] i2c: omap: get rid of b_hw flag

[Felipe Balbi]

Now that we never set STP and STT together,
that flag has been rendered useless. Let's
completely drop it.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/i2c/busses/i2c-omap.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 4d90f08..510506d 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -215,7 +215,6 @@ struct omap_i2c_dev {
 						 * if set, should be trsh+1
 						 */
 	u32			rev;
-	unsigned		b_hw:1;		/* bad h/w fixes */
 	unsigned		receiver:1;	/* true when we're in receiver mode */
 	u16			iestate;	/* Saved interrupt register */
 	u16			pscstate;
@@ -557,9 +556,6 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)
 
 	omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
 
-	if (dev->rev < OMAP_I2C_REV_ON_3630)
-		dev->b_hw = 1; /* Enable hardware fixes */
-
 	/* calculate wakeup latency constraint for MPU */
 	if (dev->set_mpu_wkup_lat != NULL)
 		dev->latency = (1000000 * dev->threshold) /
@@ -1215,9 +1211,6 @@ omap_i2c_probe(struct platform_device *pdev)
 
 		dev->fifo_size = (dev->fifo_size / 2);
 
-		if (dev->rev < OMAP_I2C_REV_ON_3630)
-			dev->b_hw = 1; /* Enable hardware fixes */
-
 		/* calculate wakeup latency constraint for MPU */
 		if (dev->set_mpu_wkup_lat != NULL)
 			dev->latency = (1000000 * dev->fifo_size) /
-- 
1.8.1.rc1.5.g7e0651a

[PATCH REBASE 0/6] i2c: omap: misc changes

[Felipe Balbi]

Hi,

On Fri, Dec 14, 2012 at 06:34:03PM +0200, Felipe Balbi wrote:
> this is just a rebase of the previous series adding support
> for amount of bytes transferred upon NACK.
> 
> Well, actually the patches implementing transferred bytes
> reporting aren't here because we need to discuss how to move
> forward.
> 
> This series is just a preparation for that, but it also
> contains a at least one bugfix.
> 
> Each and every patch has been tested with pandaboard, it
> would be nice to get Tested-bys from other folks on other
> platforms before pushing this for v3.9 (there's more than
> enough time for that).
> 
> Note that we're also dropping b_hw flag since that becomes
> useless since we'll never set STT and STP together anymore.
> 
> Give it a good round of test, please.

Wolfram, I have these patches rebased on top of v3.8-rc3 if you wish.
Let me know if I should resend them (again).

cheers

-- 
balbi
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[PATCH REBASE 0/6] i2c: omap: misc changes

[Wolfram Sang]

On Mon, Jan 14, 2013 at 09:16:28PM +0200, Felipe Balbi wrote:
> Hi,
> 
> On Fri, Dec 14, 2012 at 06:34:03PM +0200, Felipe Balbi wrote:
> > this is just a rebase of the previous series adding support
> > for amount of bytes transferred upon NACK.
> > 
> > Well, actually the patches implementing transferred bytes
> > reporting aren't here because we need to discuss how to move
> > forward.
> > 
> > This series is just a preparation for that, but it also
> > contains a at least one bugfix.
> > 
> > Each and every patch has been tested with pandaboard, it
> > would be nice to get Tested-bys from other folks on other
> > platforms before pushing this for v3.9 (there's more than
> > enough time for that).
> > 
> > Note that we're also dropping b_hw flag since that becomes
> > useless since we'll never set STT and STP together anymore.
> > 
> > Give it a good round of test, please.
> 
> Wolfram, I have these patches rebased on top of v3.8-rc3 if you wish.
> Let me know if I should resend them (again).

Yes, please rebase on top of Aaro's patches (probably in v3.8-rc5).
Patches look mostly good, have to think more about what Patch 5 is
wanting to achieve at the end of the day.