From: shc_work@mail.ru (Alexander Shiyan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: iomux-mx51: Always define PUE for pins used as GPIO
Date: Tue, 21 May 2013 12:27:25 +0400 [thread overview]
Message-ID: <1369124845-19244-1-git-send-email-shc_work@mail.ru> (raw)
This patch adds a PUE bit for pins which used as GPIO. This allow
to use the GPIOs correctly as inputs when source is open-drain with
external pullup resistor (IRQ open-drain outputs for example).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
arch/arm/mach-imx/iomux-mx51.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/iomux-mx51.h b/arch/arm/mach-imx/iomux-mx51.h
index 75bbcc4..7dc187c 100644
--- a/arch/arm/mach-imx/iomux-mx51.h
+++ b/arch/arm/mach-imx/iomux-mx51.h
@@ -34,7 +34,8 @@
#define MX51_SDHCI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_47K_UP | PAD_CTL_PUE | \
PAD_CTL_SRE_FAST | PAD_CTL_DVS)
-#define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST)
+#define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \
+ PAD_CTL_PUE | PAD_CTL_SRE_FAST)
#define MX51_PAD_CTRL_2 (PAD_CTL_PKE | PAD_CTL_HYS)
#define MX51_PAD_CTRL_3 (PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
--
1.8.1.5
next reply other threads:[~2013-05-21 8:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-21 8:27 Alexander Shiyan [this message]
2013-05-21 19:24 ` [PATCH] ARM: iomux-mx51: Always define PUE for pins used as GPIO Sascha Hauer
2013-05-22 6:19 ` Alexander Shiyan
2013-05-22 7:02 ` [PATCH] ARM: iomux-mx51: Always define PU E " Lothar Waßmann
2013-05-22 7:17 ` Re[3]: " Alexander Shiyan
2013-05-22 8:36 ` Lothar Waßmann
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