From: German.Rivera@freescale.com (J. German Rivera)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC
Date: Wed, 28 Oct 2015 16:09:44 -0500 [thread overview]
Message-ID: <1446066584-3738-1-git-send-email-German.Rivera@freescale.com> (raw)
Added sys-reboot node to the FSL's LS2085A SoC DT to leverage
the ARM-generic reboot mechanism for this SoC. This mechanism
is enabled through CONFIG_POWER_RESET_SYSCON.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
---
CHANGE HISTORY
Changes in v2:
- Address comment form Stuart Yoder:
* Removed "@<address>" from reboot node
arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
index e281ceb..8fb3646 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
@@ -131,6 +131,18 @@
interrupts = <1 9 0x4>;
};
+ rst_ccsr: rstccsr at 1E60000 {
+ compatible = "syscon";
+ reg = <0x0 0x1E60000 0x0 0x10000>;
+ };
+
+ reboot {
+ compatible ="syscon-reboot";
+ regmap = <&rst_ccsr>;
+ offset = <0x0>;
+ mask = <0x2>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
--
2.3.3
next reply other threads:[~2015-10-28 21:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-28 21:09 J. German Rivera [this message]
2015-10-29 21:49 ` [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC Arnd Bergmann
2015-10-30 16:34 ` Stuart Yoder
2015-10-30 19:59 ` Arnd Bergmann
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