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From: stillcompiling@gmail.com (stillcompiling at gmail.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi
Date: Fri, 02 Jun 2017 14:10:17 -0700	[thread overview]
Message-ID: <14677930.o4g43KgmZP@jclayton-pc> (raw)
In-Reply-To: <b944db11-bdd2-5b5f-2aa8-01f4135918be@suse.de>

On Friday, June 2, 2017 9:54:22 PM PDT Andreas F?rber wrote:
> Am 02.06.2017 um 21:39 schrieb stillcompiling at gmail.com:
> > On Friday, June 2, 2017 6:30:12 PM PDT Andreas F?rber wrote:
> >> Am 25.05.2017 um 19:29 schrieb Joshua Clayton:
> >>> diff --git a/arch/arm/boot/dts/imx6q-evi.dts
> >>> b/arch/arm/boot/dts/imx6q-evi.dts index 24fe093a66db..a0cbb2d84803
> >>> 100644
> >>> --- a/arch/arm/boot/dts/imx6q-evi.dts
> >>> +++ b/arch/arm/boot/dts/imx6q-evi.dts
> >>> @@ -82,6 +82,15 @@
> >>> 
> >>>  	pinctrl-names = "default";
> >>>  	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
> >>>  	status = "okay";
> >>> 
> >>> +
> >>> +	fpga_spi: cyclonespi at 0 {
> >> 
> >> "cyclonespi" does not strike me as the best node name.
> >> 
> >> I am guessing this is a sub-node of a SPI controller node, so no need to
> >> repeat "spi", and Cyclone seems more or less implied by "altr,fpga-".
> > 
> > True.
> > 
> >> Note that the example in the bindings doc uses "evi-fpga-spi". Nodes
> >> don't need to be (shouldn't be?) prefixed with the board. Note that
> >> bindings examples tend to get copied a lot.
> >> 
> >> Any reason not to just use "fpga at 0" in both places for simplicity?
> > 
> > Sure. fpga: fpga at 0 is probably better.
> 
> Note that I was only commenting on the node name, the latter part.
> 
> I'm not aware of any rules for the label, so that could remain unchanged
> or adopt cyclone_spi from the old node name or whatever is unique and
> syntactically valid.
Too late! Patches posted.
Oh, well, I'm not changing it back.
> 
> > I'll change it in both the dts and the binding doc.
> 
> Thanks. Maybe double-check if there's any conventions Xilinx/Lattice DTs
> are using.
> 
Of the conventions I found, fpga seemed the most "hardware descriptive"
for a plain FPGA.
The other one several binding doc examples are using is "fpga-mgr".

> Cheers,
> Andreas


-- 
~Joshua A Clayton

  reply	other threads:[~2017-06-02 21:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-25 17:29 [PATCH v11 0/6] FPGA Manager support for altera passive serial Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 2/6] doc: dt: add altera-ps-spi binding document Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton
2017-06-02 16:30   ` Andreas Färber
2017-06-02 19:39     ` stillcompiling at gmail.com
2017-06-02 19:54       ` Andreas Färber
2017-06-02 21:10         ` stillcompiling at gmail.com [this message]
2017-06-05 15:10           ` Alan Tull
2017-05-25 17:29 ` [PATCH v11 5/6] lib: add bitrev8x4() Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 6/6] fpga-manager: altera-ps-spi: use bitrev8x4 Joshua Clayton
2017-06-02 15:49 ` [PATCH v11 0/6] FPGA Manager support for altera passive serial Anatolij Gustschin
2017-06-02 20:30 ` [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton
2017-06-02 20:30   ` [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Joshua Clayton
2017-06-05 15:11     ` Alan Tull
2017-06-02 20:30   ` [PATCH v12 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton
2017-06-05 15:11     ` Alan Tull
2017-06-02 20:30   ` [PATCH v12 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton
2017-06-05 15:12     ` Alan Tull
2017-06-02 20:30   ` [PATCH v12 5/6] lib: add bitrev8x4() Joshua Clayton
2017-06-05 15:12     ` Alan Tull
2017-06-02 20:30   ` [PATCH v12 6/6] fpga-manager: altera-ps-spi: use bitrev8x4 Joshua Clayton
2017-06-05 15:13     ` Alan Tull
2017-06-05 15:11   ` [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Alan Tull

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