From: stillcompiling@gmail.com (stillcompiling at gmail.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi
Date: Fri, 02 Jun 2017 12:39:27 -0700 [thread overview]
Message-ID: <6513199.IxvCuS6eYj@jclayton-pc> (raw)
In-Reply-To: <a4d0815c-593f-57a9-41fc-ab636ca9b9e5@suse.de>
On Friday, June 2, 2017 6:30:12 PM PDT Andreas F?rber wrote:
> Hi,
>
> Am 25.05.2017 um 19:29 schrieb Joshua Clayton:
> > Add support for Altera V FPGA connected to an spi port
>
> Did you mean "Altera Cyclone V"?
I meant to shorten it from Altera Cyclone V to Altera FPGA.
Didn't quite make it. Will fix and resubmit today.
>
> > to the evi devicetree file
> >
> > Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
> > ---
> >
> > arch/arm/boot/dts/imx6q-evi.dts | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx6q-evi.dts
> > b/arch/arm/boot/dts/imx6q-evi.dts index 24fe093a66db..a0cbb2d84803 100644
> > --- a/arch/arm/boot/dts/imx6q-evi.dts
> > +++ b/arch/arm/boot/dts/imx6q-evi.dts
> > @@ -82,6 +82,15 @@
> >
> > pinctrl-names = "default";
> > pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
> > status = "okay";
> >
> > +
> > + fpga_spi: cyclonespi at 0 {
>
> "cyclonespi" does not strike me as the best node name.
>
> I am guessing this is a sub-node of a SPI controller node, so no need to
> repeat "spi", and Cyclone seems more or less implied by "altr,fpga-".
True.
>
> Note that the example in the bindings doc uses "evi-fpga-spi". Nodes
> don't need to be (shouldn't be?) prefixed with the board. Note that
> bindings examples tend to get copied a lot.
>
> Any reason not to just use "fpga at 0" in both places for simplicity?
Sure. fpga: fpga at 0 is probably better.
I'll change it in both the dts and the binding doc.
>
> > + compatible = "altr,fpga-passive-serial";
> > + spi-max-frequency = <20000000>;
> > + reg = <0>;
> > + pinctrl-0 = <&pinctrl_fpgaspi>;
> > + nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
> > + nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
> > + };
> >
> > };
> >
> > &ecspi3 {
>
> [snip]
>
> Regards,
> Andreas
--
~Joshua A Clayton
next prev parent reply other threads:[~2017-06-02 19:39 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-25 17:29 [PATCH v11 0/6] FPGA Manager support for altera passive serial Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 2/6] doc: dt: add altera-ps-spi binding document Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton
2017-06-02 16:30 ` Andreas Färber
2017-06-02 19:39 ` stillcompiling at gmail.com [this message]
2017-06-02 19:54 ` Andreas Färber
2017-06-02 21:10 ` stillcompiling at gmail.com
2017-06-05 15:10 ` Alan Tull
2017-05-25 17:29 ` [PATCH v11 5/6] lib: add bitrev8x4() Joshua Clayton
2017-05-25 17:29 ` [PATCH v11 6/6] fpga-manager: altera-ps-spi: use bitrev8x4 Joshua Clayton
2017-06-02 15:49 ` [PATCH v11 0/6] FPGA Manager support for altera passive serial Anatolij Gustschin
2017-06-02 20:30 ` [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton
2017-06-02 20:30 ` [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Joshua Clayton
2017-06-05 15:11 ` Alan Tull
2017-06-02 20:30 ` [PATCH v12 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton
2017-06-05 15:11 ` Alan Tull
2017-06-02 20:30 ` [PATCH v12 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton
2017-06-05 15:12 ` Alan Tull
2017-06-02 20:30 ` [PATCH v12 5/6] lib: add bitrev8x4() Joshua Clayton
2017-06-05 15:12 ` Alan Tull
2017-06-02 20:30 ` [PATCH v12 6/6] fpga-manager: altera-ps-spi: use bitrev8x4 Joshua Clayton
2017-06-05 15:13 ` Alan Tull
2017-06-05 15:11 ` [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Alan Tull
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