From: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
To: MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
"Rob Herring" <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Nishanth Menon <nm@ti.com>, "Stephen Boyd" <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org,
"Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>,
srv_heupstream@mediatek.com, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, fan.chen@mediatek.com,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/8] cpufreq: mediatek: add clock enable for intermediate clock
Date: Thu, 16 May 2019 17:08:39 +0800 [thread overview]
Message-ID: <1557997725-12178-3-git-send-email-andrew-sh.cheng@mediatek.com> (raw)
In-Reply-To: <1557997725-12178-1-git-send-email-andrew-sh.cheng@mediatek.com>
From: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>
Intermediate clock is not always enabled by ccf in different projects,
so cpufreq should always enable it by itself.
Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
---
drivers/cpufreq/mediatek-cpufreq.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index f2464c1ff17c..b2fc01b17b57 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -376,13 +376,17 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
goto out_free_resources;
}
+ ret = clk_prepare_enable(inter_clk);
+ if (ret)
+ goto out_free_opp_table;
+
/* Search a safe voltage for intermediate frequency. */
rate = clk_get_rate(inter_clk);
opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
if (IS_ERR(opp)) {
pr_err("failed to get intermediate opp for cpu%d\n", cpu);
ret = PTR_ERR(opp);
- goto out_free_opp_table;
+ goto out_disable_clock;
}
info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
dev_pm_opp_put(opp);
@@ -401,6 +405,9 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
return 0;
+out_disable_clock:
+ clk_disable_unprepare(inter_clk);
+
out_free_opp_table:
dev_pm_opp_of_cpumask_remove_table(&info->cpus);
@@ -427,6 +434,10 @@ static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
clk_put(info->cpu_clk);
if (!IS_ERR(info->inter_clk))
clk_put(info->inter_clk);
+ if (!IS_ERR(info->inter_clk)) {
+ clk_disable_unprepare(info->inter_clk);
+ clk_put(info->inter_clk);
+ }
dev_pm_opp_of_cpumask_remove_table(&info->cpus);
}
--
2.12.5
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next prev parent reply other threads:[~2019-05-16 9:11 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 9:08 [PATCH 0/8] Add cpufreq and cci devfreq for mt8183, and SVS support Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 1/8] cpufreq: mediatek: change to regulator_get_optional Andrew-sh.Cheng
2019-05-16 9:08 ` Andrew-sh.Cheng [this message]
2019-05-16 9:08 ` [PATCH 3/8] cpufreq: mediatek: Add support for mt8183 Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 4/8] dt-bindings: devfreq: add compatible for mt8183 cci devfreq Andrew-sh.Cheng
2019-05-20 4:43 ` Viresh Kumar
2019-05-16 9:08 ` [PATCH 5/8] devfreq: add mediatek " Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 6/8] PM / OPP: Support adjusting OPP voltages at runtime Andrew-sh.Cheng
2019-05-20 4:47 ` Viresh Kumar
2019-07-29 3:39 ` Roger Lu
2019-07-29 9:20 ` Viresh Kumar
2019-05-16 9:08 ` [PATCH 7/8] cpufreq: mediatek: add opp notification for SVS support Andrew-sh.Cheng
2019-05-27 7:02 ` Hsin-Yi Wang
2019-05-16 9:08 ` [PATCH 8/8] devfreq: mediatek: cci devfreq register " Andrew-sh.Cheng
2019-05-24 8:04 ` Hsin-Yi Wang
2019-05-16 9:23 ` [PATCH 0/8] Add cpufreq and cci devfreq for mt8183, and " Viresh Kumar
2019-05-16 12:23 ` andrew-sh.cheng
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