From: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
To: MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
"Rob Herring" <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Nishanth Menon <nm@ti.com>, "Stephen Boyd" <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org,
"Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>,
srv_heupstream@mediatek.com, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, fan.chen@mediatek.com,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/8] dt-bindings: devfreq: add compatible for mt8183 cci devfreq
Date: Thu, 16 May 2019 17:08:41 +0800 [thread overview]
Message-ID: <1557997725-12178-5-git-send-email-andrew-sh.cheng@mediatek.com> (raw)
In-Reply-To: <1557997725-12178-1-git-send-email-andrew-sh.cheng@mediatek.com>
From: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>
This adds dt-binding documentation of cci devfreq
for Mediatek MT8183 SoC platform.
Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
---
.../bindings/devfreq/mt8183-cci-devfreq.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt
diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt b/Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt
new file mode 100644
index 000000000000..3189902902e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci-devfreq.txt
@@ -0,0 +1,20 @@
+* Mediatek Cache Coherent Interconnect(CCI) frequency device
+
+Required properties:
+- compatible: should contain "mediatek,mt8183-cci" for frequency scaling of CCI
+- clocks: for frequency scaling of CCI
+- clock-names: for frequency scaling of CCI driver to reference
+- regulator: for voltage scaling of CCI
+- operating-points-v2: for frequency scaling of CCI opp table
+
+Example:
+ cci: cci {
+ compatible = "mediatek,cci";
+ clocks = <&apmixedsys CLK_APMIXED_CCIPLL>;
+ clock-names = "cci_clock";
+ operating-points-v2 = <&cci_opp>;
+ };
+
+ &cci {
+ proc-supply = <&mt6358_vproc12_reg>;
+ };
\ No newline at end of file
--
2.12.5
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next prev parent reply other threads:[~2019-05-16 9:09 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 9:08 [PATCH 0/8] Add cpufreq and cci devfreq for mt8183, and SVS support Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 1/8] cpufreq: mediatek: change to regulator_get_optional Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 2/8] cpufreq: mediatek: add clock enable for intermediate clock Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 3/8] cpufreq: mediatek: Add support for mt8183 Andrew-sh.Cheng
2019-05-16 9:08 ` Andrew-sh.Cheng [this message]
2019-05-20 4:43 ` [PATCH 4/8] dt-bindings: devfreq: add compatible for mt8183 cci devfreq Viresh Kumar
2019-05-16 9:08 ` [PATCH 5/8] devfreq: add mediatek " Andrew-sh.Cheng
2019-05-16 9:08 ` [PATCH 6/8] PM / OPP: Support adjusting OPP voltages at runtime Andrew-sh.Cheng
2019-05-20 4:47 ` Viresh Kumar
2019-07-29 3:39 ` Roger Lu
2019-07-29 9:20 ` Viresh Kumar
2019-05-16 9:08 ` [PATCH 7/8] cpufreq: mediatek: add opp notification for SVS support Andrew-sh.Cheng
2019-05-27 7:02 ` Hsin-Yi Wang
2019-05-16 9:08 ` [PATCH 8/8] devfreq: mediatek: cci devfreq register " Andrew-sh.Cheng
2019-05-24 8:04 ` Hsin-Yi Wang
2019-05-16 9:23 ` [PATCH 0/8] Add cpufreq and cci devfreq for mt8183, and " Viresh Kumar
2019-05-16 12:23 ` andrew-sh.cheng
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