From: "Rob Herring (Arm)" <robh@kernel.org>
To: Vincent Guittot <vincent.guittot@linaro.org>
Cc: Ionut.Vicovan@nxp.com, linux-arm-kernel@lists.infradead.org,
bhelgaas@google.com, linux-kernel@vger.kernel.org,
ciprianmarian.costea@nxp.com, conor+dt@kernel.org,
linux-pci@vger.kernel.org, s32@nxp.com,
ghennadi.procopciuc@oss.nxp.com, imx@lists.linux.dev,
kwilczynski@kernel.org, jingoohan1@gmail.com, Frank.li@nxp.com,
larisa.grigore@nxp.com, chester62515@gmail.com,
cassel@kernel.org, bogdan.hamciuc@nxp.com,
devicetree@vger.kernel.org, mani@kernel.org,
lpieralisi@kernel.org, mbrugger@suse.com, krzk+dt@kernel.org,
Ghennadi.Procopciuc@nxp.com
Subject: Re: [PATCH 1/4 v5] dt-bindings: PCI: s32g: Add NXP PCIe controller
Date: Thu, 20 Nov 2025 09:23:40 -0600 [thread overview]
Message-ID: <176365221942.1402463.4737452946243069736.robh@kernel.org> (raw)
In-Reply-To: <20251118160238.26265-2-vincent.guittot@linaro.org>
On Tue, 18 Nov 2025 17:02:35 +0100, Vincent Guittot wrote:
> Describe the PCIe host controller available on the S32G platforms.
>
> Co-developed-by: Ionut Vicovan <Ionut.Vicovan@nxp.com>
> Signed-off-by: Ionut Vicovan <Ionut.Vicovan@nxp.com>
> Co-developed-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>
> Signed-off-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>
> Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
> Co-developed-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
> Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
> Co-developed-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
> Co-developed-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
> Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
> ---
> .../bindings/pci/nxp,s32g-pcie.yaml | 130 ++++++++++++++++++
> 1 file changed, 130 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-11-20 15:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-18 16:02 [PATCH 0/4 v5] PCI: s32g: Add support for PCIe controller Vincent Guittot
2025-11-18 16:02 ` [PATCH 1/4 v5] dt-bindings: PCI: s32g: Add NXP " Vincent Guittot
2025-11-18 16:52 ` Frank Li
2025-11-20 11:27 ` Manivannan Sadhasivam
2025-11-20 15:23 ` Rob Herring (Arm) [this message]
2025-11-18 16:02 ` [PATCH 2/4 v5] PCI: dw: Add more registers and bitfield definition Vincent Guittot
2025-11-18 16:54 ` Frank Li
2025-11-18 16:02 ` [PATCH 3/4 v5] PCI: s32g: Add initial PCIe support (RC) Vincent Guittot
2025-11-18 17:01 ` Frank Li
2025-11-20 7:25 ` Vincent Guittot
2025-11-20 8:22 ` Manivannan Sadhasivam
2025-11-20 9:06 ` Vincent Guittot
2025-11-20 10:25 ` Manivannan Sadhasivam
2025-11-20 17:57 ` Vincent Guittot
2025-11-18 16:02 ` [PATCH 4/4 v5] MAINTAINERS: Add MAINTAINER for NXP S32G PCIe driver Vincent Guittot
2025-11-26 19:42 ` Ghennadi Procopciuc
2025-11-26 20:17 ` Ciprian Marian Costea
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