* [PATCH v1 1/3] clk: rockchip: rk3128: add pclk_pmu as critical clock
2017-09-01 2:01 [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks Elaine Zhang
@ 2017-09-01 2:01 ` Elaine Zhang
2017-09-01 2:01 ` [PATCH v1 2/3] clk: rockchip: rk3128: fix up pvtm and mipi_24m gate regs description error Elaine Zhang
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Elaine Zhang @ 2017-09-01 2:01 UTC (permalink / raw)
To: linux-arm-kernel
pclk_pmu need always on, and no dts node to handle this clk,
so make it as critical clock
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3128.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index 62d7854e4b87..f15c9b874911 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -541,7 +541,7 @@ enum rk3128_plls {
GATE(0, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 4, GFLAGS),
GATE(0, "pclk_mipiphy", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 0, GFLAGS),
- GATE(0, "pclk_pmu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 2, GFLAGS),
+ GATE(0, "pclk_pmu", "pclk_pmu_pre", 0, RK2928_CLKGATE_CON(9), 2, GFLAGS),
GATE(0, "pclk_pmu_niu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 3, GFLAGS),
/* PD_MMC */
@@ -577,6 +577,7 @@ enum rk3128_plls {
"aclk_peri",
"hclk_peri",
"pclk_peri",
+ "pclk_pmu",
};
static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v1 2/3] clk: rockchip: rk3128: fix up pvtm and mipi_24m gate regs description error
2017-09-01 2:01 [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks Elaine Zhang
2017-09-01 2:01 ` [PATCH v1 1/3] clk: rockchip: rk3128: add pclk_pmu as critical clock Elaine Zhang
@ 2017-09-01 2:01 ` Elaine Zhang
2017-09-01 2:01 ` [PATCH v1 3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock Elaine Zhang
2017-09-09 12:22 ` [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks Heiko Stuebner
3 siblings, 0 replies; 5+ messages in thread
From: Elaine Zhang @ 2017-09-01 2:01 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3128.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index f15c9b874911..ce02d2cff608 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -315,13 +315,13 @@ enum rk3128_plls {
RK2928_CLKGATE_CON(10), 8, GFLAGS),
GATE(SCLK_PVTM_CORE, "clk_pvtm_core", "xin24m", 0,
- RK2928_CLKGATE_CON(10), 8, GFLAGS),
+ RK2928_CLKGATE_CON(10), 0, GFLAGS),
GATE(SCLK_PVTM_GPU, "clk_pvtm_gpu", "xin24m", 0,
- RK2928_CLKGATE_CON(10), 8, GFLAGS),
+ RK2928_CLKGATE_CON(10), 1, GFLAGS),
GATE(SCLK_PVTM_FUNC, "clk_pvtm_func", "xin24m", 0,
- RK2928_CLKGATE_CON(10), 8, GFLAGS),
+ RK2928_CLKGATE_CON(10), 2, GFLAGS),
GATE(SCLK_MIPI_24M, "clk_mipi_24m", "xin24m", CLK_IGNORE_UNUSED,
- RK2928_CLKGATE_CON(10), 8, GFLAGS),
+ RK2928_CLKGATE_CON(2), 15, GFLAGS),
COMPOSITE(SCLK_SDMMC, "sclk_sdmmc0", mux_mmc_src_p, 0,
RK2928_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 6, DFLAGS,
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v1 3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock
2017-09-01 2:01 [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks Elaine Zhang
2017-09-01 2:01 ` [PATCH v1 1/3] clk: rockchip: rk3128: add pclk_pmu as critical clock Elaine Zhang
2017-09-01 2:01 ` [PATCH v1 2/3] clk: rockchip: rk3128: fix up pvtm and mipi_24m gate regs description error Elaine Zhang
@ 2017-09-01 2:01 ` Elaine Zhang
2017-09-09 12:22 ` [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks Heiko Stuebner
3 siblings, 0 replies; 5+ messages in thread
From: Elaine Zhang @ 2017-09-01 2:01 UTC (permalink / raw)
To: linux-arm-kernel
sclk_timer5 is for arm arch counter, so need always on.
but no dts node to handle this clk, so make it as critical clock
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3128.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index ce02d2cff608..5970a50671b9 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -578,6 +578,7 @@ enum rk3128_plls {
"hclk_peri",
"pclk_peri",
"pclk_pmu",
+ "sclk_timer5",
};
static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks
2017-09-01 2:01 [PATCH v1 0/3] clk: rockchip: rk3128: fix up some clks Elaine Zhang
` (2 preceding siblings ...)
2017-09-01 2:01 ` [PATCH v1 3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock Elaine Zhang
@ 2017-09-09 12:22 ` Heiko Stuebner
3 siblings, 0 replies; 5+ messages in thread
From: Heiko Stuebner @ 2017-09-09 12:22 UTC (permalink / raw)
To: linux-arm-kernel
Am Freitag, 1. September 2017, 10:01:43 CEST schrieb Elaine Zhang:
> Elaine Zhang (3):
> clk: rockchip: rk3128: add pclk_pmu as critical clock
> clk: rockchip: rk3128: fix up pvtm and mipi_24m gate regs description
> error
> clk: rockchip: rk3126: add sclk_timer5 as critical clock
applied all 3 as fixes for 4.14
(with some adjustments on subjects and commit messages)
Thanks
Heiko
^ permalink raw reply [flat|nested] 5+ messages in thread